参数资料
型号: DSPB56366AG120
厂商: Freescale Semiconductor
文件页数: 34/110页
文件大小: 0K
描述: IC DSP 24BIT AUD 120MHZ 144-LQFP
产品变化通告: Product Discontinuation 24/Feb/2012
标准包装: 60
系列: DSP56K/Symphony
类型: 音频处理器
接口: 主机接口,I²C,SAI,SPI
时钟速率: 120MHz
非易失内存: ROM(240 kB)
芯片上RAM: 69kB
电压 - 输入/输出: 3.30V
电压 - 核心: 3.30V
工作温度: -40°C ~ 110°C
安装类型: 表面贴装
封装/外壳: 144-LQFP
供应商设备封装: 144-LQFP(20x20)
包装: 托盘
Overview
DSP56366 Technical Data, Rev. 3.1
Freescale Semiconductor
1-3
1.1
Features
1.1.1
DSP56300 Modular Chassis
120 Million Instructions Per Second (MIPS) with an 120 MHz clock at 3.3V.
Object Code Compatible with the 56K core.
Data ALU with a 24 x 24 bit multiplier-accumulator and a 56-bit barrel shifter. 16-bit arithmetic
support.
Program Control with position independent code support and instruction cache support.
Six-channel DMA controller.
PLL based clocking with a wide range of frequency multiplications (1 to 4096), predivider factors
(1 to 16) and power saving clock divider (2i: i=0 to 7). Reduces clock noise.
Internal address tracing support and OnCE
for Hardware/Software debugging.
JTAG port.
Very low-power CMOS design, fully static design with operating frequencies down to DC.
STOP and WAIT low-power standby modes.
1.1.2
On-chip Memory Configuration
7Kx24 Bit Y-Data RAM and 8Kx24 Bit Y-Data ROM.
13Kx24 Bit X-Data RAM and 32Kx24 Bit X-Data ROM.
40Kx24 Bit Program ROM.
3Kx24 Bit Program RAM and 192x24 Bit Bootstrap ROM. 1K of Program RAM may be used as
Instruction Cache or for Program ROM patching.
2Kx24 Bit from Y Data RAM and 5Kx24 Bit from X Data RAM can be switched to Program RAM
resulting in up to 10Kx24 Bit of Program RAM.
1.1.3
Off-chip Memory Expansion
External Memory Expansion Port.
Off-chip expansion up to two 16M x 24-bit word of Data memory.
Off-chip expansion up to 16M x 24-bit word of Program memory.
Simultaneous glueless interface to SRAM and DRAM.
1.1.4
Peripheral Modules
Serial Audio Interface (ESAI): up to 4 receivers and up to 6 transmitters, master or slave. I2S, Sony,
AC97, network and other programmable protocols.
Serial Audio Interface I(ESAI_1): up to 4 receivers and up to 6 transmitters, master or slave. I2S,
Sony, AC97, network and other programmable protocols
The ESAI_1 shares four of the data pins with ESAI, and ESAI_1 does NOT support HCKR and
HCKT (high frequency clocks)
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