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| 型号： | EF-ISE-LOG-FL |
| 厂商： | Xilinx Inc |
| 文件页数： | 20/50页 |
| 文件大小： | 0K |
| 描述： | DESIGN SUITE LOGIC EDITION |
| 标准包装： | 1 |
| 系列： | ISE® 设计套件 |
| 类型： | 集成软件环境（ISE） |
| 适用于相关产品： | Xilinx FPGAs |
| 其它名称： | Q5689019A |
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Chapter 1: What’s New in ISE Design Suite
Embedded Edition
The following describes what's new in Embedded Tools and IP in ISE Design Suite 13.1.
EDK Overall Enhancements
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Consistent SDK workspace selection behavior across Project Navigator, Xilinx
Platform Studio (XPS), and SDK.
TDP device-based licensing support.
XPS Enhancements
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Changes to Base System Builder
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AXI systems are now the default in Base System Builder for Spartan?-6, Virtex?-
6, and 7 Series designs. Base System Builder only supports AXI systems for 7
Series designs.
New shared bus interconnect used for low frequency peripheral bus, reduces
design size.
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Changes to System Assembly View (SAV)
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New DRC feature allows you to run design rule checks at any time.
When AXI IP is added in SAV, the following functions are automatically
completed: bus, clock, and reset connections, and address generation
When adding an AXI MicroBlaze processor instance, the following functions are
automatically completed: interconnect, DRAM memory and cache connections,
debug connections, clocks, and LMB BRAM
You can now modify the order of IP listed in the SAV
For multi-processor systems, you can filter on processor system instance in the
SAV
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Other XPS Changes
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All software development tools have been removed from XPS
Software projects have been removed from XPS
The main toolbar has been streamlined and now contains fewer buttons.
Create and Import IP (CIP) wizard now supports creation of AXI4 and AXI4-Lite
slave peripherals
AXI BFMs project generation now included in CIP wizard. Note : A license for
AXI BFMs must be purchased separately.
ELF files can now be assigned for implementation or simulation and remain
synchronized with Project Navigator.
Debug Wizard supports inclusion of AXI monitors and hardware/software co-
debug of AXI-based designs.
When the XPS design is a submodule in a Project Navigator project, simulation is
only available in Project Navigator.
When you export your design to SDK, the SDK workspace is no longer set
automatically.
20
ISE Design Suite 13: Release Notes Guide
UG631 (v 13.2)
相关PDF资料 |
PDF描述 |
|---|---|
| VE-JVN-EZ-F4 | CONVERTER MOD DC/DC 18.5V 25W |
| VE-JVM-EZ-F2 | CONVERTER MOD DC/DC 10V 25W |
| VE-JVM-EY-S | CONVERTER MOD DC/DC 10V 50W |
| VE-JVL-EZ-F3 | CONVERTER MOD DC/DC 28V 25W |
| M3BFK-4018J | IDC CABLE - MSR40K/MC40G/MCF40K |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EF-ISE-LOG-NL | 功能描述:DESIGN SUITE LOGIC EDITION ISE12 RoHS:是 类别:编程器，开发系统 >> 软件 系列:ISE® 设计套件 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| EF-ISE-SYSTEM-FL | 功能描述:ISE DESIGN SYST FLOATING LICENSE RoHS:是 类别:编程器，开发系统 >> 软件 系列:ISE® 设计套件 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| EF-ISE-SYSTEM-NL | 功能描述:SOFTWARE ISE SYS EDITION RoHS:是 类别:编程器，开发系统 >> 软件 系列:ISE® 设计套件 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| EFJ02-001M | 制造商:Black Box Corporation 功能描述:TOSLINK TO MINI PLUG PATCH COR |
| EFJ04-001M | 制造商:Black Box Corporation 功能描述:PREMIUM GRADE DIGITAL OPTICAL CABLE 1 METER |
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