参数资料
型号: EPF10K200S
英文描述: Programmable Logic
中文描述: 可编程逻辑
文件页数: 29/138页
文件大小: 2116K
代理商: EPF10K200S
124
Altera Corporation
FLEX 10K Embedded Programmable Logic Family Data Sheet
The entire reconfiguration process may be completed in less than 320 ms
using an EPF10K250A device with a DCLK frequency of 10 MHz. This
process can be used to reconfigure an entire system dynamically. In-field
upgrades can be performed by distributing new configuration files.
Programming Files
Despite being function- and pin-compatible, FLEX 10KA and FLEX 10KE
devices are not programming- or configuration-file compatible with
FLEX 10K devices. A design should be recompiled before it is transferred
from a FLEX 10K device to an equivalent FLEX 10KA or FLEX 10KE
device. This recompilation should be performed to create a new
programming or configuration file and to check design timing on the
faster FLEX 10KA or FLEX 10KE device. The programming or
configuration files for EPF10K50 devices can program or configure an
EPF10K50V device. However, Altera recommends recompiling a design
for the EPF10K50V device when transferring it from the EPF10K50 device.
Conguration Schemes
The configuration data for a FLEX 10K device can be loaded with one of
five configuration schemes (see Table 117), chosen on the basis of the
target application. An EPC2, EPC1, or EPC1441 configuration device,
intelligent controller, or the JTAG port can be used to control the
configuration of a FLEX 10K device, allowing automatic configuration on
system power-up.
Multiple FLEX 10K devices can be configured in any of the five
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device.
Table 117. Data Sources for Configuration
Configuration Scheme
Data Source
Configuration device
EPC2, EPC1, or EPC1441 configuration device
Passive serial (PS)
BitBlaster, ByteBlaster, or ByteBlasterMV download cable, or
serial data source
Passive parallel asynchronous (PPA)
Parallel data source
Passive parallel synchronous (PPS)
Parallel data source
JTAG
BitBlaster, ByteBlaster, or ByteBlasterMV download cable, or
microprocessor with Jam File or Jam Byte-Code File
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