参数资料
型号: FDC642P
厂商: Fairchild Semiconductor
文件页数: 2/5页
文件大小: 0K
描述: MOSFET P-CH 20V 4A SSOT-6
产品培训模块: High Voltage Switches for Power Processing
产品变化通告: Design/Process Change 11/May/2007
Mold Compound Change 08/April/2008
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET P 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 20V
电流 - 连续漏极(Id) @ 25° C: 4A
开态Rds(最大)@ Id, Vgs @ 25° C: 65 毫欧 @ 4A,4.5V
Id 时的 Vgs(th)(最大): 1.5V @ 250µA
闸电荷(Qg) @ Vgs: 10nC @ 4.5V
输入电容 (Ciss) @ Vds: 640pF @ 10V
功率 - 最大: 800mW
安装类型: 表面贴装
封装/外壳: SOT-23-6 细型,TSOT-23-6
供应商设备封装: 6-SSOT
包装: 标准包装
其它名称: FDC642PDKR
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
? BV DSS
? T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = -250 μ A, V GS = 0 V
I D = -250 μ A, referenced to 25°C
V DS = -16 V, V GS = 0 V
V GS = ±8 V, V DS = 0 V
-20
-13
-1
±10
V
mV / °C
μ A
μ A
On Characteristics
V GS(th)
? V GS(th)
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = -250 μ A
I D = -250 μ A, referenced to 25°C
-0.4
-0.6
2.5
-1.5
V
mV/°C
V GS = -4.5 V, I D = -4.0 A
45
65
r DS(on)
g FS
Static Drain to Source On Resistance
Forward Transconductance
V GS = -2.5 V, I D = -3.2 A
V GS = -4.5 V, I D = -4.0 A,
T J = 125°C
V DS = -5 V, I D = -4.0 A
55
62
15
100
90
m ?
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = -10 V, V GS = 0 V,
f = 1 MHz
700
110
95
925
150
145
pF
pF
pF
Switching Characteristics
t d(on)
Turn-On Delay Time
6
12
ns
t r
t d(off)
t f
Q g
Q gs
Q gd
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V DD = -10 V, I D = -1 A,
V GS = -4.5 V, R GEN = 6 ?
V DD = -10 V, I D = -4 A
V GS = --4.5 V
7
120
52
11
1.1
3.0
14
190
83
16
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics
I S
Maximum Continuous Drain-Source Diode Forward Current
-1.3
A
V SD
Source-Drain Diode Forward Voltage
V GS = 0 V, I S = -1.3 A
(Note 2)
-0.7
-1.2
V
Notes:
1: R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R θ JC is guaranteed by design while R θ CA is determined by the user ’s board design.
a. 78 °C/W when mounted on a 1 in 2 pad of 2 oz copper.
b. 156 °C/W when mounted on a minimum pad of 2 oz copper.
2: Pulse Test: Pulse Width<300 us, Duty Cycle<2.0%.
?2010 Fairchild Semiconductor Corporation
FDC642P Rev . C2
2
www.fairchildsemi.com
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