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| 型号： | FDMA520PZ |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | MOSFET P-CH 20V 7.3A MLP2X2 |
| 产品目录绘图： | MicroFET 2x2, SC-75 Single |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET P 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 20V |
| 电流 - 连续漏极(Id) @ 25° C： | 7.3A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 30 毫欧 @ 7.3A，4.5V |
| Id 时的 Vgs(th)（最大）： | 1.5V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 20nC @ 4.5V |
| 输入电容 (Ciss) @ Vds： | 1645pF @ 10V |
| 功率 - 最大： | 900mW |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WDFN 裸露焊盘 |
| 供应商设备封装： | MicroFET 2x2 |
| 包装： | 标准包装 |
| 产品目录页面： | 1609 (CN2011-ZH PDF) |
| 其它名称： | FDMA520PZDKR |
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
BV DSS
T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = –250 A, V GS = 0V
I D = –250 A, referenced to 25°C
V DS = –16V, V GS = 0V
V GS = ±12V, V DS = 0V
–20
–8.4
–1
±10
V
mV/° C
A
A
On Characteristics
V GS(th)
V GS(th)
T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = –250 A
I D = –250 A, referenced to 25°C
–0.6
–1.1
3.5
–1.5
V
mV/°C
V GS = –4.5V, I D = –7.3A
26
30
r DS(on)
Static Drain to Source On Resistance
V GS = –2.5V, I D = –5.5A
42
53
m
V GS = –4.5V, I D = –7.3A ,T J = 125°C
36
55
g FS
Forward Transconductance
V DS = –5V, I D = –7.3A
22
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = –10V, V GS = 0V,
f = 1MHz
1235
255
225
1645
340
340
pF
pF
pF
Switching Characteristics
t d(on)
t r
t d(off)
t f
Q g
Q gs
Q gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V DD = –10V, I D = –7.3A
V GS = –4.5V, R GEN = 6
V DD = –5V, I D = –7.3A
V GS = –4.5V
10
29
83
74
14
2.9
4.4
20
47
133
119
20
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics
I S
Maximum Continuous Drain-Source Diode Forward Current
–2
A
V SD
t rr
Q rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V GS = 0V, I S = –2A
I F =–7.3A, di/dt = 100A/ s
–0.8
30
22
–1.2
45
33
V
ns
nC
Notes:
1: R JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
a. 52°C/W when mounted on
a 1 in 2 pad of 2 oz copper
b.145°C/W when mounted on a
minimum pad of 2 oz copper
2: Pulse Test: Pulse Width < 30 0 s, Duty cycle < 2.0%.
3: The diode connected between the gate and the source serves only as protection against ESD. No gate overvoltage rating is implied.
FDMA520PZ Rev.B2
2
www.fairchildsemi.com
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