参数资料
型号: FDPC8011S
厂商: Fairchild Semiconductor
文件页数: 8/15页
文件大小: 0K
描述: MOSF DL N CH ASYM 25V PWR CLIP33
标准包装: 1
系列: PowerTrench®
FET 型: 2 N 沟道(双)非对称型
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 25V
电流 - 连续漏极(Id) @ 25° C: 13A,27A
开态Rds(最大)@ Id, Vgs @ 25° C: 6 毫欧 @ 13A,10V
Id 时的 Vgs(th)(最大): 2.2V @ 250µA
闸电荷(Qg) @ Vgs: 19nC @ 10V
输入电容 (Ciss) @ Vds: 1240pF @ 13V
功率 - 最大: 800mW,900mW
安装类型: 表面贴装
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-PQFN(3.3X3.3),Power33
包装: 标准包装
其它名称: FDPC8011SFSDKR
Typical Characteristics (Q2 N-Channel) T J =
10
I D = 27 A
8
V DD = 10 V
6
V DD = 13 V
4
V DD = 15 V
25 o C unlenss otherwise noted
10000
1000
C iss
C oss
C rss
2
100
f = 1 MHz
V GS = 0 V
0
0
10
20 30 40 50
Q g , GATE CHARGE (nC)
60
70
50
0.1
1 10
V DS , DRAIN TO SOURCE VOLTAGE (V)
30
Figure 20. Gate Charge Characteristics
100
120
100
Figure 21. Capacitance vs Drain
to Source Voltage
T J = 25 o C
80
V GS = 4.5 V
V GS = 10 V
10
T J = 100 o C
60
T J = 125 o C
40
Limited by Package
R θ JC = 3.5 C/W
20
o
1
0.001
0.01
0.1
1
10
100
1000
0
25
50
75
100
125
150
T C , CASE TEMPERATURE ( C )
200
t AV , TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
o
Figure 23. Maximum Continouns Drain
Current vs Ambient Temperature
3000
R θ JA = 135 C/W
100
100 μ s
1000
SINGLE PULSE
o
10
100
1 ms
1
THIS AREA IS
LIMITED BY r DS ( on )
10 ms
SINGLE PULSE
100 ms
10
0.1
T J = MAX RATED
R θ JA = 135 o C/W
1s
10s
T A = 25 o C
DC
1
10
10
10
10
10
10
0.01
0.01
0.1
1
10
100
0.5
-4
-3
-2
-1
0
1
100
1000
V DS , DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
t, PULSE WIDTH (sec)
Figure 25. Single Pulse Maximum
Power Dissipation
?2012 Fairchild Semiconductor Corporation
FDPC8011S Rev.C5
8
www.fairchildsemi.com
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