参数资料
型号: FDS2672
厂商: Fairchild Semiconductor
文件页数: 2/6页
文件大小: 0K
描述: MOSFET N-CH 200V 3.9A 8-SOIC
产品变化通告: Mold Compound Change 12/Dec/2007
标准包装: 1
系列: UltraFET™
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 200V
电流 - 连续漏极(Id) @ 25° C: 3.9A
开态Rds(最大)@ Id, Vgs @ 25° C: 70 毫欧 @ 3.9A,10V
Id 时的 Vgs(th)(最大): 4V @ 250µA
闸电荷(Qg) @ Vgs: 46nC @ 10V
输入电容 (Ciss) @ Vds: 2535pF @ 100V
功率 - 最大: 1W
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 标准包装
产品目录页面: 1603 (CN2011-ZH PDF)
其它名称: FDS2672DKR
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
? BV DSS
? T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0V
I D = 250 μ A, referenced to 25°C
V DS = 160V, V GS =0V
V DS = 160V, V GS =0V T J = 55°C
V GS = ±20V
200
206
1
10
±100
V
mV/° C
μ A
μ A
nA
On Characteristics (Note 2)
V GS(th)
? V GS(th )
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25°C
2
2.9
-11
4
V
mV/°C
V GS = 10V, I D = 3.9A
59
70
r DS(on)
Drain to Source On Resistance
V GS = 6V, I D = 3.5A
63
80
m ?
V GS = 10V, I D = 3.9A, T J = 125°C
124
148
g FS
Forward Transcondductance
V DS = 10V,I D = 3.9A
15
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 100V, V GS = 0V,
f = 1MHz
f = 1MHz
1905
100
30
0.7
2535
135
45
pF
pF
pF
?
Switching Characteristics
t d(on)
t r
t d(off)
t f
Q g(TOT)
Q gs
Q gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller”Charge
V DD = 100V, I D = 3.9A
V GS = 10V, R GEN = 6 ?
V DD =100V I D = 3.9A
22
10
35
10
33
11
7
35
20
56
20
46
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics
V SD
t rr
Q rr
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
V GS = 0V, I S = 3.9A
I F = 3.9A, di/dt = 100A/ μ s
I F = 3.9A, di/dt = 100A/ μ s
0.75
67
179
1.2
101
269
V
ns
nC
Notes:
1: R θ JA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user’s board design.
a)
50°C/W (10 sec)
b) 125°C/W when mounted on a
62.5°C/W steady state
when mounted on a 1in 2
pad of 2 oz copper
Scale 1:1 on letter size paper
2: Pulse Test: Pulse Width < 300 us, Duty Cycle < 2.0%.
3: Starting T J = 25 ° C, L = 3mH, I AS = 5A, V DD = 100V, V GS = 10V
minimum pad .
FDS2672 Rev. B
2
www.fairchildsemi.com
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