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| 型号： | FDS2734 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 250V 3A 8-SOIC |
| 产品变化通告： | Mold Compound Change 12/Dec/2007 |
| 标准包装： | 1 |
| 系列： | UltraFET™ |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 250V |
| 电流 - 连续漏极(Id) @ 25° C： | 3A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 117 毫欧 @ 3A，10V |
| Id 时的 Vgs(th)（最大）： | 4V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 45nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 2610pF @ 100V |
| 功率 - 最大： | 1W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 标准包装 |
| 产品目录页面： | 1603 (CN2011-ZH PDF) |
| 其它名称： | FDS2734DKR |
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Drain to Source Breakdown Voltage
I D = 250 μ A, V GS = 0V
250
V
? BV DSS
? T J
Breakdown Voltage Temperature
Coefficient
I D = 250 μ A, referenced to
25 o C
157
mV/ o C
I DSS
I GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V DS = 200V,V GS =0 V
V DS = 200V, V GS = 0V T J = 55 o C
V GS = ± 20V, V DS =0 V
1
10
± 100
μ A
nA
On Characteristics (Note 2)
V GS(th)
? V GS(th)
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to
25 o C
2
3
-10.7
4
V
mV/ c
V GS = 10V, I D = 3.0A,
97
117
r DS( on )
g FS
Drain to Source On Resistance
Forward Transconductance
V GS = 6V , I D = 2.8A,
V GS = 10V, I D = 3.0A, T J = 125 o C
V DS =10V, I D =3.0A,
101
205
15.1
126
225
m ?
S
Dynamic Characteristics
C iss
C oss
C rss
R G
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 100V, V GS = 0V,
f = 1MHz
f = 1MHz
1960
85
26
0.7
2610
130
40
pF
pF
pF
?
Switching Characteristics
t d(on)
t r
t d(off)
t f
Q g
Q gs
Q gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain Charge
V DD = 125V, I D = 3A
V GS = 10V, R GS = 6 ?
V DS = 125V, V GS = 10V
I D = 3.0A
23
11
40
11
32
9
8
37
19
64
19
45
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics
V SD
t rr
Q rr
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
I SD = 3.0A
I F = 3.0 A, d iF /dt = 100A/ μ s
0.74
72
185
1.2
108
278
V
ns
nC
Notes:
1: R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user’s board design.
a) 50°C/W when
mounted on a 1in 2
pad of 2 oz copper
b) 125 ° C/W when
mounted on a minimum
pad of 2 oz copper
Scale 1 : 1 on letter size paper
2: Pulse Test Width <300 μ s, Duty Cycle <2% .
3: Starting T J = 25 ° C, L = 1mH, I AS = 5A, V DD = 100V, V GS = 10V
FDS2734 Rev. B
2
www.fairchildsemi.com
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