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| 型号： | FDS9958 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | MOSFET P-CH 60V DUAL SO-8 |
| 产品变化通告： | Mold Compound Change 12/Dec/2007 |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | 2 个 P 沟道（双） |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 60V |
| 电流 - 连续漏极(Id) @ 25° C： | 2.9A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 105毫欧 @ 2.9A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 23nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 1020pF @ 30V |
| 功率 - 最大： | 900mW |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | SO-8 |
| 包装： | 标准包装 |
| 产品目录页面： | 1603 (CN2011-ZH PDF) |
| 其它名称： | FDS9958DKR |
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
? BV DSS
? T J
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
I D = -250 μ A, V GS = 0V
I D = -250 μ A, referenced to 25°C
-60
-52
V
mV/°C
I DSS
Zero Gate Voltage Drain Current
V DS = -48V,
V GS = 0V
T J = 125°C
-1
-100
μ A
I GSS
Gate to Source Leakage Current
V GS = ±20V, V DS = 0V
±100
nA
On Characteristics
V GS(th)
? V GS(th)
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = -250 μ A
I D = -250 μ A, referenced to 25°C
-1.0
-1.6
4
-3.0
V
mV/°C
V GS = -10V, I D = -2.9A
82
105
r DS(on)
Static Drain to Source On Resistance
V GS = -4.5V, I D = -2.5A
103
135
m ?
V GS = -10V, I D = -2.9A, T J = 125°C
131
190
g FS
Forward Transconductance
V DD = -5V, I D = -2.9A
7.7
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = -30V, V GS = 0V,
f = 1MHz
765
90
40
1020
120
65
pF
pF
pF
Switching Characteristics
t d(on)
t r
t d(off)
t f
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
V DD = -30V, I D = -2.9A,
V GS = -10V, R GEN = 6 ?
6
3
27
6
12
10
43
12
ns
ns
ns
ns
Q g
Q g
Q gs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
V GS = 0V to -10V
V GS = 0V to -4.5V
V DD = -30V,
I D = -2.9A
16
8
2
23
12
nC
nC
nC
Q gd
Gate to Drain “Miller” Charge
3
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0V, I S = -1.3A
(Note 2)
-0.8
-1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = -2.9A, di/dt = 100A/ μ s
26
21
42
35
ns
nC
NOTES:
1. R θ JA is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a) 78°C/W when
mounted on a 1 in 2
pad of 2 oz copper
2. Pulse Test: Pulse Width < 30 0 μ s, Duty cycle < 2.0%.
3. UIL condition: Starting T J = 25°C, L = 3mH, I AS = 6A, V DD = 60V, V GS = 10V.
b) 135°C/W when
mounted on a
minimun pad
?2007 Fairchild Semiconductor Corporation
FDS9958 Rev.C
2
www.fairchildsemi.com
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