参数资料
型号: FDZ192NZ
厂商: Fairchild Semiconductor
文件页数: 2/7页
文件大小: 0K
描述: MOSFET N-CH 20V 6-WLCSP
标准包装: 5,000
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 20V
电流 - 连续漏极(Id) @ 25° C: 5.3A
开态Rds(最大)@ Id, Vgs @ 25° C: 39 毫欧 @ 2A,4.5V
Id 时的 Vgs(th)(最大): 1V @ 250µA
闸电荷(Qg) @ Vgs: 17nC @ 4.5V
输入电容 (Ciss) @ Vds: 1220pF @ 10V
功率 - 最大: 900mW
安装类型: 表面贴装
封装/外壳: 6-UFBGA,WLCSP
供应商设备封装: 6-WLCSP
包装: 带卷 (TR)
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
? BV DS S
? T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0 V
I D = 250 μ A, referenced to 25 °C
V DS = 16 V, V GS = 0 V
V GS = ±8 V, V DS = 0 V
20
10
1
±10
V
mV/°C
μ A
μ A
On Characteristics
V GS(th)
? V GS(th )
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25 °C
0.4
0.7
-3
1.0
V
mV/°C
V GS = 4.5 V, I D = 2.0 A
V GS = 2.5 V, I D = 2.0 A
26
29
39
43
r DS(on)
Static Drain to Source On Resistance
V GS = 1.8 V, I D = 1.0 A
V GS = 1.5 V, I D = 1.0 A
33
38
49
55
m ?
V GS = 4.5 V, I D = 2.0 A,
T J =125 °C
31
47
g FS
Forward Transconductance
V DS = 5 V, I D = 5.3 A
36
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = 10 V, V GS = 0 V,
f = 1 MHz
915
145
100
1220
195
150
pF
pF
pF
Switching Characteristics
t d(on)
Turn-On Delay Time
6.5
13
ns
t r
t d(off)
t f
Rise Time
Turn-Off Delay Time
Fall Time
V DD = 10 V, I D = 5.3 A,
V GS = 4.5 V, R GEN = 6 ?
4
50
20
10
80
32
ns
ns
ns
Q g
Q gs
Q gd
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V GS = 0 V to 4.5 V
V DD = 10 V,
I D = 5.3 A
12
1.3
2.3
17
nC
nC
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0 V, I S = 1.1 A
(Note 2)
0.6
1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 5.3 A, di/dt = 100 A/ μ s
18
4.6
32
10
ns
nC
Notes:
1. R θ JA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a. 65 °C/W when mounted on
a 1 in 2 pad of 2 oz copper.
2. Pulse Test: Pulse Width < 30 0 μ s, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection ESD. No gate overvoltage rating is implied.
b. 133 °C/W when mounted on a
minimum pad of 2 oz copper.
?2010 Fairchild Semiconductor Corporation
FDZ192NZ Rev.C1
2
www.fairchildsemi.com
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