参数资料
型号: GT-48006A
厂商: Galileo Technology Services, LLC
英文描述: Low Cost Two Port 10/100Mbps Ethernet Bridge/Switch Controller(低成本、双端口10/100Mbps以太网桥式/交换式控制器)
中文描述: 低成本双口10/100Mbps以太网桥/开关控制器(低成本,双端口10/100以太网桥式/交换式控制器)
文件页数: 4/33页
文件大小: 352K
代理商: GT-48006A
GT-48006A Low Cost Two Port 10/100 Ethernet Bridge/Switch Controller
12
7.
GT-48006A Buffers and Queues
The GT-48006A incorporates two transmit queues for the 2 Ethernet ports and one common receive buffer area (see
Figure 1.) The receive buffers as well as the transmit queues are located in the DRAM along with the Address Table.
The GT-48006A data structure components are the following:
Receive Buffer - A common Receive Buffer area for all ports. The buffer is divided into 308 or 1008 blocks
(depending on the DRAM size) of 1.5KBytes (1536 bytes) each. Each block contains an entire packet.
Rx Empty List - A list of 308 or 1008 bits. Each bit contains the status of its appropriate receive block in the
DRAM (empty or occupied).
Tx Descriptors - A set of 2 transmit descriptor rings. Each ring contains 1024 descriptors. The descriptor size
is one 32-bit word and contains the Block Address divided by 0x600 (1.5K), the byte count and the packet type
(Multicast or Unicast).
Read/Write Pointers - 2 pairs of pointers to the transmit descriptors.
Figure 1:
GT-48006A Buffers and Queues
7.1
Rx Buffer Options
There are two modes of operation for the Rx buffers: dynamic buffer allocation and fixed buffer size. Buffer allocation
mode is selected via a RESET strapping option as shown in Table 1 on page 7.
In dynamic buffer allocation mode, each port uses receive buffers from a common pool of available buffers. There are
1008 buffers available with 2 Mbyte of DRAM, 308 buffers with 1 Mbyte.
In fixed buffer mode, each port is assigned a fixed number of receive buffers. There are 320 buffers available per port
with 2 Mbyte of DRAM, 140 buffers with 1 Mbyte.
The overflow of the Rx buffer threshold is indicated by the “Receive Buffer Full” LED in the Serial LED Interfaces. This
indication is active only in fixed buffer mode.
Read Pointer
Write Pointer
21
Byte Count Blk Addr
10 9
0
Frame #0
Frame #1
Frame #2
Receive Buffer (for all ports and PCI)
Tx Descriptors: 1024 X 3
Rx Empty List
DRAM
GT-48006
M/U
20
Frame #n
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