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参数资料
| 型号： | HFA3860AIV |
| 厂商： | INTERSIL CORP |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | 3.3V 288-mc CPLD |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP48 |
| 封装： | 7 X 7 X 1 MM, PLASTIC, TQFP-48 |
| 文件页数： | 6/39页 |
| 文件大小： | 251K |
| 代理商： | HFA3860AIV |
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2-136
External Interfaces
There are three primary digital interface ports for the
HFA3860A that are used for configuration and during normal
operation of the device as shown in Figure 1. These ports are:
The
ControlPort
,whichisusedtoconfigure,writeand/or
read the status of the internal HFA3860A registers.
The
TX Port
, which is used to accept the data that
needs to be transmitted from the network processor.
The
RX Port
, which is used to output the received
demodulated data to the network processor.
In addition to these primary digital interfaces the device
includes a byte wide parallel
Test Port
which can be configured
to output various internal signals and/or data. The device can
also be set into various power consumption modes by external
control. The HFA3860A contains three Analog to Digital (A/D)
converters. The analog interfaces to the HFA3860A include the
Inphase(I)andquadrature(Q)datacomponentinputs,andthe
RF signal strength indicator input. A reference voltage divider is
also required external to the device.
Control Port (4 Wire)
The serial control port is used to serially write and read data
to/from the device. This serial port can operate up to a 11MHz
rate or 1/2 the maximum master clock rate of the device, MCLK
(whichever is lower). MCLK must be running during
programming. This port is used to program and to read all
internal registers. The first 8 bits always represent the address
followed immediately by the 8 data bits for that register. The two
LSBs of address are don’t care, but reserved for future
expansion. The serial transfers are accomplished through the
serial data pin (SD). SD is a bidirectional serial data bus. Chip
Select (CS), and Read/Write (R/W) are also required as
handshake signals for this port. The clock used in conjunction
with the address and data on SD is SCLK. This clock is
provided by the external source and it is an input to the
HFA3860A. The timing relationships of these signals are
illustrated in Figures 2 and 3. R/W is high when data is to be
read, and low when it is to be written. CS is an asynchronous
reset to the state machine. CS must be active (low) during the
entire data transfer cycle. CS selects the serial control port
device only. The serial control port operates asynchronously
from the TX and RX ports and it can accomplish data transfers
independent of the activity at the other digital or analog ports.
The HFA3860A has 31 internal registers that can be configured
through the control port. These registers are listed in the
Configuration and Control Internal Register table. Table 1 lists
the configuration register number, a brief name describing the
register, and the HEX address to access each of the registers.
The type indicates whether the corresponding register is Read
only (R) or Read/Write (R/W). Some registers are two bytes
wide as indicated on the table (high and low bytes).
TXD
TXCLK
TX_RDY
RXD
RXC
MD_RDY
CS
SD
SCLK
R/W
SDI
I (ANALOG)
Q (ANALOG)
RSSI (ANALOG)
V
REFN
V
REFP
TX_PE
RX_PE
RESET
TEST
TX_PORT
RX_PORT
CONTROL_PORT
ANALOG
INPUTS
A/D
REFERENCE
POWER
DOWN
SIGNALS
TEST
PORT
8
HFA3860A
FIGURE 1. EXTERNAL INTERFACE
ANTSEL
Q
I
TRANSMIT
OUTPUTS
NOTES:
1. The HFA3860A always uses the rising edge of SCLK. SD, R/W and CS hold times allow the controller to use either the rising or falling edge.
2. This port operates essentially the same as the HFA3824 with the exception that the AS signal of the 3824 is not required.
FIGURE 2. CONTROL PORT READ TIMING
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
SCLK
SD
CS
R/W
LSB
DATA OUT
MSB
MSB
ADDRESS IN
FIRST ADDRESS BIT
FIRST DATABIT OUT
HFA3860A
相关PDF资料 |
PDF描述 |
|---|---|
| HFA3861AIN96 | Circular Connector; No. of Contacts:21; Series:MS27473; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:22-21 RoHS Compliant: No |
| HFA3861AIN | 288 MACROCELL 3.3 VOLT ISP CPLD |
| HFA3863IN | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3863IN96 | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3863 | Direct Sequence Spread Spectrum Baseband Processor(直接序列扩谱基带处理器) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HFA3860AIV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860AIV96 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband |
| HFA3860B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:nullDirect Sequence Spread Spectrum Baseband Processor |
| HFA3860BIV | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HFA3860BIV WAF | 制造商:Harris Corporation 功能描述: |
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