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参数资料
型号： HW-V5-ML555-G
厂商： Xilinx Inc
文件页数： 81/108页
文件大小： 0K
描述： BOARD EVAL FOR VIRTEX-5 ML555
产品培训模块： PCI Express and Virtex® -5 FPGAs
标准包装： 1
系列： Virtex® -5
类型： FPGA
适用于相关产品： Virtex?-5 FPGA
所含物品： 板，线缆，CD
配用： HW-AFX-SMA-SFP-ND - CONVERSION MODULE SMA - SFP
HW-AFX-SMA-SATA-ND - CONVERSION MODULE SMA - SATA
HW-AFX-SMA-RJ45-ND - CONVERSION MODULE SMA - RJ45
HW-AFX-SMA-HSSDC2-ND - CONVERSION MODULE SMA - HSSDC2
HW-AFX-BERG-EPHY-ND - DAUGHTER CARD PHY BERG-EPHY
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XC5VLX50T-1FF1136I-ND - IC FPGA VIRTEX-5 50K 1136FBGA
更多...
其它名称： 122-1586
HW-V5-ML555-G-ND
Table 3-34:
R
ML555 Onboard DC-to-DC Voltage Converters
Voltage Regulators
ML555 Board
Input Voltage Source
Nominal
Maximum
Reference
Designator (1)
PCI or PCI-X
Mode (2)
PCI Express
Mode (3)
Output
Voltage
Output
Current
DC Power Sink
VR1 (4)
Not Used (2)
PCI Express
Connector 12V
Input
5V
6A
Provides 5V power to
onboard voltage
regulators in PCI
Express mode only
DDR2 memory, other
VR2 (5)
PCI Connector 5V Input
VR1 5V Output
1.8V
6A
1.8V ML555 peripherals,
and FPGA 1.8V V CCO
reference voltage
DDR2 memory interface
VR3 (5)
PCI Connector 5V Input
VR1 5V Output
0.9V
6A
termination and FPGA
0.9V reference voltage
U12 (5)
U13 (5)
PCI Connector 5V Input
PCI Connector 5V Input
VR1 5V Output
VR1 5V Output
2.5V
2.5V
5A
5A
FPGA V CCAUX supply
FPGA V CCO , XGI
header and other ML555
2.5V peripherals
U14 (5)
VR4 (4,5)
VR5 (4,5)
VR6 (4,5)
VR7 (4,5)
PCI Connector 5V Input
PCI Connector 3.3V
Input
PCI Connector 3.3V
Input
PCI Connector 3.3V
Input
PCI Connector 3.3V
Input
VR1 5V Output
U14 3.0V Output
PCI Express
Connector 3.3V
Input
PCI Express
Connector 3.3V
Input
PCI Express
Connector 3.3V
Input
3.0V
1.0V
1.2V
AVTTTX and
AVTRX
1.2V
AVCCPLL
1.0V AVCC
5A
6A
4A
4A
4A
PCI FPGA 3.0V V CCO
reference voltage
FPGA V CCINT voltage
GTP 1.2V analog
voltage for transmitter
and receiver
termination voltages
GTP 1.2V analog
voltage for PLL circuitry
GTP 1.0V analog
voltage
Notes:
1. Refer to Figure 3-14, page 76 for a block diagram of the ML555 DC power system. Additional design information is available on the
ML555 board schematics.
2. For PCI and PCI-X design applications, position switch SW8 ( Figure 3-16, page 78 ) to power the GTP transceiver analog supplies
and FPGA V CCINT from the 3.3V input voltage of the PCI connector. Remove shunts on header P18 before applying power to the
ML555 board.
3. For PCI Express design applications, position switch SW8 ( Figure 3-16, page 78 ) to power FPGA V CCINT from the 3.0V regulator
U14 output. GTP transceiver analog supplies are powered from the 3.3V input voltage of the PCI Express connector. Install two
shunts on connector P18 (P18-1 to P18-2 and P18-3 to P18-4) to connect VR1 5V output to power the onboard regulators.
4. These voltage regulator output ports are connected in series through a 10 m Ω Kelvin resistor to the load on the ML555 board. VR1
has a 150 m Ω series Kelvin resistor. Refer to “Power Supply Monitoring,” page 82 for additional information.
5. FPGA power supplies can be turned on in any sequence. The Virtex-5 FPGA data sheet provides a table for “Power-On Current for
Virtex-5 Devices” for a specified voltage power-on sequence (V CCINT - V CCAUX - V CCO ). The ML555 board does not have, nor does
it need to have, voltage sequencing circuitry for the DC-to-DC voltage converters on the board.
Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
www.xilinx.com
81
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