参数资料
型号: IBIS4-A-6600
厂商: Cypress Semiconductor Corp.
英文描述: 6.6 MP CMOS Image Sensor
中文描述: 6.6万像素的CMOS图像传感器
文件页数: 29/40页
文件大小: 1698K
代理商: IBIS4-A-6600
IBIS4-A-6600
CYII4SM6600AB
ADVANCE
INFORMATION
Document Number: 001-02366 Rev. *D
Page 29 of 40
Pin List
Table 20. is a list of all the pins and their function. In total,
there are 68 pins. All pins with the same name can be
connected together.
Table 20. Pin List
Pin
Pin Name
Pin Type
Expected Voltage
[V]
0
1.08
Pin Description
1
2
CMD_COL_CTU
CMD_COL
Input
Input
Biasing of columns (ctu). Decouple with 100 nF to GNDA.
Biasing of columns. Connect to VDDA with R = 10 k and
decouple to GNDA with C = 100 nF.
Biasing of column amplifiers. Connect to VDDA with R =
100 k and decouple to GNDA with C = 100 nF.
Biasing of column amplifiers. Connect to VDDA with R =
10 M and decouple to GNDA with C = 100 nF.
Biasing of DAC for dark reference. Can be used to set
output range of DAC.
Default: decouple to GNDA with C = 100 nF.
Biasing of DAC for output dark level. Can be used to set
output range of DAC. Default: connect to GNDA.
VDD of analog part [2.5V].
GND (&substrate) of analog part.
VDD of digital part [2.5V].
GND (&substrate) of digital part.
Biasing of first stage output amplifiers. Connect to
VDDAMP with R = 50 k and decouple to GNDAMP with
C = 100 nF.
Biasing of second stage output amplifiers. Connect to
VDDAMP with R = 25 k and decouple to GNDAMP with
C = 100 nF.
Biasing of third stage output amplifiers. Connect to
VDDAMP with R = 100 k and decouple to GNDAMP with
C = 100 nF.
Clock of digital parameter upload. Shifts on rising edge.
Serial address and data input. 16 bit word. Address first.
MSB first.
VDD of analog output [2.5V] (Can be connected to
VDDA).
Biasing of first stage ADC. Connect to VDDA_ADC with
R = 50 k and decouple to GNDA_ADC with C = 100 nF.
Biasing of second stage ADC. Connect to VDDA_ADC
with R = 50 k and decouple to GNDA_ADC.
Biasing of input stage ADC. Connect to VDDA_ADC with
R = 180 k and decouple to GNDA_ADC with C = 100 nF.
GND (&substrate) of analog output.
Analog output 1.
3
CMD_COLAMP
Input
0.66
4
CMD_COLAMP_CTU
Input
0.37
5
RCAL_DAC_DARK
Input
1.27 @ code 128
DAC_DARK reg
6
RCAL_DAC_OUT
Input
0
7
8
9
10
11
VDDA
GNDA
VDDD
GNDD
CMD_OUT_1
Power
Power
Power
Power
Input
2.5
0
2.5
0
0.78
12
CMD_OUT_2
Input
0.97
13
CMD_OUT_3
Input
0.67
14
15
SPI_CLK
SPI_DATA
Input
Input
-
-
16
VDDAMP
Power
2.5
17
CMD_FS_ADC
Input
0.73
18
CMD_SS_ADC
Input
0.73
19
CMD_AMP_ADC
input
0.59
20
21
GNDAMP
OUT1
Ground
Output
0
Black level: 1 @
code 190
DAC_RAW reg.
See OUT1.
2.5
22
23
ADC_IN1
VDDAMP
Input
Power
Analog input ADC 1.
VDD of analog output [2.5V] (Can be connected to
VDDA).
[+] Feedback
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