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参数资料
| 型号： | IBIS4-A-6600 |
| 厂商： | Cypress Semiconductor Corp. |
| 英文描述： | 6.6 MP CMOS Image Sensor |
| 中文描述： | 6.6万像素的CMOS图像传感器 |
| 文件页数： | 30/40页 |
| 文件大小： | 1698K |
| 代理商： | IBIS4-A-6600 |
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IBIS4-A-6600
CYII4SM6600AB
ADVANCE
INFORMATION
Document Number: 001-02366 Rev. *D
Page 30 of 40
24
OUT2
Output
Black level: 1 @
code 190
DAC_RAW reg.
See OUT2.
2.5
0
0
2.5
-
Analog output 2.
25
26
27
28
29
30
ADC_IN2
VDDD
GNDD
GNDA
VDDA
REG_CLOCK
Input
Power
Power
Power
Power
Input
Analog input ADC 2.
VDD of digital part [2.5V].
GND (&substrate) of digital part.
GND (&substrate) of analog part.
VDD of analog part [2.5V].
Register clock. Data on internal bus is copied to
corresponding registers on rising edge.
System clock defining the pixel rate (nominal 40 MHz,
50% +/- 5% duty cycle).
Global system reset (active high).
Line clock.
Start frame readout.
GND (&substrate) of digital part ADC.
VDD of digital part [2.5V] ADC.
GND (&substrate) of analog part.
VDD of analog part [2.5 V].
ADC high reference voltage (e.g. connect to VDDA_ADC
with R = 560
and decouple to GNDA_ADC with C = 100
nF.
ADC low reference voltage (e.g. connect to GNDA_ADC
with R = 220
and decouple to GNDA_ADC with C = 100
nF.
GND (&substrate) of analog part.
VDD of analog part [2.5 V].
GND (&substrate) of digital part ADC.
VDD of digital part [2.5 V] ADC.
Variable reset voltage (dual slope).
31
SYS_CLOCK
Input
-
32
33
34
35
36
37
38
39
SYS_RESET
Y_CLK
Y_START
GNDD_ADC
VDDD_ADC
GNDA_ADC
VDDA_ADC
VHIGH_ADC
Input
Input
Input
Power
Power
Power
Power
Input
-
-
-
0
2.5
0
2.5
1.5
40
VLOW_ADC
Input
0.42
41
42
43
44
45
GNDA_ADC
VDDA_ADC
GNDD_ADC
VDDD_ADC
VDD_RESET_DS
Power
Power
Power
Power
Power
0
2.5
0
2.5
2.5 (for no dual
slope)
-
-
46
47
ADC_CLK_EXT
EOL
Input
Output
External ADC clock.
Diagnostic end of line signal (produced by sequencer),
can be used as Y_CLK.
Diagnostic end of frame signal (produced by sequencer),
can be used as Y_START.
Diagnostic signal. High during pixel readout.
Temperature measurement. Output voltage varies
linearly with temperature.
ADC data output (MSB).
VDD of pixel core [2.5V].
Anti-blooming ground. Set to 1 V for improved
anti-blooming behavior.
ADC data output.
ADC data output.
ADC data output.
48
EOF
Output
-
49
50
PIX_VALID
TEMP
Output
Output
-
-
51
52
53
ADC_D<9>
VDD_PIX
GND_AB
Output
Power
Power
-
2.5
0
54
55
56
ADC_D<8>
ADC_D<7>
ADC_D<6>
Output
Output
Output
-
-
-
Table 20. Pin List
(continued)
Pin
Pin Name
Pin Type
Expected Voltage
[V]
Pin Description
[+] Feedback
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IBIS4-A-6600-C-2 | 制造商:Cypress Semiconductor 功能描述:IMAGE SENSOR COLOR CMOS 2210X3002PIXELS - Bulk |
| IBIS4-A-6600-M-2 | 制造商:Cypress Semiconductor 功能描述:IMAGE SENSOR MONOCHROME CMOS 2210X3002PIXELS - Bulk |
| IBIS5-A-1300-C-1 | 制造商:Cypress Semiconductor 功能描述:IMAGE SENSOR COLOR CMOS 1280X1024PIXELS 84PIN LCC - Bulk |
| IBIS5-A-1300-C-2 | 制造商:Cypress Semiconductor 功能描述:Image Sensor Color CMOS 1280x1024Pixels 84-Pin LCC 制造商:Cypress Semiconductor 功能描述:IMAGE SENSOR COLOR CMOS 1280X1024PIXELS 84PIN LCC - Bulk |
| IBIS5-A-1300-M-1 | 制造商:Cypress Semiconductor 功能描述:Image Sensor Monochrome CMOS 1280x1024Pixels 84-Pin LCC 制造商:Cypress Semiconductor 功能描述:IMAGE SENSOR MONOCHROME CMOS 1280X1024PIXELS 84PIN LCC - Bulk |
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