参数资料
型号: ISL12022MIBZ-EVAL
厂商: Intersil
文件页数: 20/31页
文件大小: 0K
描述: EVAL BOARD FOR ISL12022MIBZ
应用说明: Addressing Power Issues in Real Time Clock Appls
产品培训模块: Solutions for Industrial Control Applications
标准包装: 1
系列: *
ISL12022M
27
FN6668.9
June 20, 2012
Measuring Oscillator Accuracy
The best way to analyze the ISL12022M frequency accuracy is to
set the IRQ/FOUT pin for a specific frequency, and look at the
output of that pin on a high accuracy frequency counter (at least
7 digits accuracy). Note that the IRQ/FOUT is an drain output and
will require a pull-up resistor.
Using the 1.0Hz output frequency is the most convenient as the
ppm error is expressed in Equation 6:
Other frequencies may be used for measurement but the error
calculation becomes more complex. Use the FOUT output and a
frequency counter for the most accurate results. Also, when the
proper layout guidelines above are observed, the oscillator
should start-up in most circuits in less than one second.
Temperature Compensation Operation
The ISL12022M temperature compensation feature needs to be
enabled by the user. This must be done in a specific order as
follows.
1. Read register 0Dh, the BETA register. This register contains
the 5-bit BETA trimmed value, which is automatically loaded
on initial power-up. Mask off the 5 LSB’s of the value just
read.
2. Bit 7 of the BETA register is the master enable control for
temperature sense operation. Set this to “1” to allow
continuous temperature frequency correction. Frequency
correction will then happen every 60 seconds with VDD
applied.
3. Bits 5 and 6 of the BETA register control temperature
compensation in battery backup mode (see Table 15). Set the
values for the operation desired.
4. Write back to register 0Dh making sure not to change the
5 LSB values, and include the desired compensation control
bits.
Note that every time the BETA register is written with the TSE
bit = 1, a temperature compensation cycle is instigated and a
new correction value will be loaded into the FATR/FDTR registers
(if the temperature changed since the last conversion).
Also note that registers 0Bh and 0Ch, the ITR0 and ALPHA registers,
are READ-ONLY, and cannot be written to. Also the value for BETA is
locked and cannot be changed with a write. However, It is still a good
idea to do the bit masking when doing TSE bit changes.
Daylight Savings Time (DST) Example
DST involves setting the forward and back times and allowing the
RTC device to automatically advance the time or set the time
back. This can be done for current year, and future years. Many
regions have DST rules that use standard months, weeks and
time of the day, which permit a pre-programmed, permanent
setting.
Table 26 shows an example setup for the ISL12022M.
The Enable bit (DSTE) is in the Month forward register, so the BCD
value for that register is altered with the additional bit. The Week
and Day values along with Week/Day vs Date select bit is in the
Week/Day register, so that value is also not straight BCD. Hour and
Month are normal BCD, but the Hour doesn’t use the MIL bit since
Military time PM values are already discretely different from
AM/PM time PM values. The DST reverse setting utilizes the option
to select the last week of the month for October, which could have
4 or 5 weeks but needs to have the time change on the last
Sunday.
Note that the DSTADJ bit in the status register monitors whether
the DST forward adjustment has happened. When it is “1”, DST
forward has taken place. When it is “0”, then either DST reverse
has happened, or it has been reset either by initial power-up or if
the DSTE bit has been set to “0”.
ppm error
F
OUT
11e6
=
(EQ. 6)
TABLE 26. DST EXAMPLE
VARIABLE
VALUE
REGISTER
VALUE
Month Forward and DST
Enable
April
15h
84h
Week and Day Forward and
select Day/Week, not Date
1st Week and
Sunday
16h
48h
Date Forward
not used
17h
00h
Hour Forward
2am
18h
02h
Month Reverse
October
19h
10h
Week and Day Reverse and
select Day/Week, not Date
Last Week and
Sunday
1Ah
78h
Date Reverse
not used
1Bh
00h
Hour Reverse
2am
1Ch
02h
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