参数资料
型号: ISL6265CHRTZ
厂商: Intersil
文件页数: 23/27页
文件大小: 0K
描述: IC CTRLR MULTI-OUTPUT 48TQFN
标准包装: 50
应用: 控制器,AMD SVI 兼容移动式 CPU
输入电压: 5 V ~ 24 V
输出数: 3
输出电压: 0.5 V ~ 1.55 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 管件
ISL6265C
Δ V C = -----------------------------
I PP
V O
and Equation 21:
(EQ. 21)
8 ? C O ? f SW
If the output of the converter has to support a load with high
pulsating current, several capacitors will need to be paralleled to
reduce the total ESR until the required V P-P is achieved. The
inductance of the capacitor can cause a brief voltage dip if the
load transient has an extremely high slew rate. Capacitor ESL can
significantly impact output voltage ripple. Low inductance
capacitors should be considered. A capacitor dissipates heat as a
function of RMS current and frequency. Be sure that I P-P is shared
by a sufficient quantity of paralleled capacitors so that they
operate below the maximum rated RMS current at F SW . Take into
account that the rated value of a capacitor can degrade as much
as 50% as the DC voltage across it increases.
Selection of the Input Capacitor
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper MOSFETs.
Their RMS current capability must be sufficient to handle the AC
Where:
- I MAX is the maximum continuous I LOAD of the converter
- I PP,N is the ratio of inductor peak-to-peak ripple current to
I MAX
- D is the duty cycle that is adjusted to take into account the
efficiency of the converter which is written as:
D = ------------------ (EQ. 23)
V IN ? η
- where η is converter efficiency
Figure 13 provides the same input RMS current information for
two-phase designs.
0.3
0.2
I P-P,N = 0.5
component of the current drawn by the upper MOSFETs, which is
related to duty cycle and the number of active phases.
0.1
I P-P,N = 0.75
I P-P,N = 0
The important parameters for the bulk input capacitance are the
voltage rating and the RMS current rating. For reliable operation,
select bulk capacitors with voltage and current ratings above the
maximum input voltage and capable of supplying the RMS
0
0
0.2
0.4
0.6
0.8
1.0
current required by the switching circuit. Their voltage rating
should be at least 1.25x greater than the maximum input
voltage, while a voltage rating of 1.5x is a preferred rating.
Figure 12 is a graph of the input RMS ripple current, normalized
relative to output load current, as a function of duty cycle for a
single-phase regulator that is adjusted for converter efficiency.
DUTY CYCLE (V IN/ V O )
FIGURE 13. NORMALIZED RMS INPUT CURRENT FOR
2-PHASE CONVERTER
In addition to the bulk capacitance, some low ESL ceramic
capacitance is recommended to decouple between the drain of
0.60
0.55
0.50
0.45
0.40
0.35
I P-P,N = 1
I P-P,N = 0.50
I P-P,N = 0
I P-P,N = 0.75
the high-side MOSFET and the source of the low-side MOSFET.
MOSFET Selection and Considerations
The choice of MOSFETs depends on the current each MOSFET will
be required to conduct, the switching frequency, the capability of
the MOSFETs to dissipate heat, and the availability and nature of
heat sinking and air flow.
0.30
0.25
0.20
0.15
0.10
0.05
0
0
0.1
0.2
I P-P,N = 0.25
0.3 0.4 0.5 0.6 0.7
DUTY CYCLE (V IN/ V O )
0.8
0.9
1.0
Typically, a MOSFET cannot tolerate even brief excursions beyond
their maximum drain to source voltage rating. The MOSFETs used
in the power stage of the converter should have a maximum V DS
rating that exceeds the sum of the upper voltage tolerance of the
input power source and the voltage spike that occurs when the
MOSFETs switch.
There are several power MOSFETs readily available that are
optimized for DC/DC converter applications. The preferred high-
FIGURE 12. NORMALIZED RMS INPUT CURRENT FOR
SINGLE PHASE CONVERTER
The normalized RMS current calculation is written as Equation 22:
side MOSFET emphasizes low gate charge so that the device
spends the least amount of time dissipating power in the linear
region. The preferred low-side MOSFET emphasizes low r DS(ON)
when fully saturated to minimize conduction loss.
D ? ( 1 – D ) + ? ------ ? ? I PP , N
I IN_RMS , N =
D
? 12 ?
2
(EQ. 22)
For the low-side (LS) MOSFET, the power loss can be assumed to
be conductive only and is written as Equation 24:
P CON_LS ≈ I LOAD ? r DS ( ON ) _LS ? ( 1 – D )
23
2
(EQ. 24)
FN6976.2
January 11, 2013
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