参数资料
| 型号： | ISL6323CRZ |
| 厂商： | Intersil |
| 文件页数： | 19/36页 |
| 文件大小： | 0K |
| 描述： | IC HYBRID CTRLR PWM MONO 48-QFN |
| 标准包装： | 43 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 最高 2V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
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ISL6323
.
V OUT = V REF – V OFS – ? ------------- ? DCR ? ? ---------- ? --------------- ? ? K ? R FB ?
R SET ?
? N
? 3
EXTERNAL CIRCUIT
FS
ISL6323 INTERNAL CIRCUIT
? I OUT 400 1 ?
?
R FS
COMP
DROOP
CONTROL
TO
OSCILLATOR
(EQ. 13)
Where, V REF is the reference voltage, V OFS is the
programmed offset voltage, I OUT is the total output current
of the converter, K is the DC gain of the RC filter across the
inductor (K is defined in Equation 7), N is the number of
C C
active channels, and DCR is the Inductor DCR value.
R C
R FB
+
V OUT
-
FB
+
(V DROOP + V OFS )
-
VSEN
RGND
∑
+
+
-
+
I AVG
I OFS
V COMP
ERROR
AMPLIFIER
VID
DAC
Output-Voltage Offset Programming
The ISL6323 allows the designer to accurately adjust the
offset voltage by connecting a resistor, R OFS , from the OFS
pin to VCC or GND. When R OFS is connected between OFS
and VCC, the voltage across it is regulated to 1.6V. This
causes a proportional current (I OFS ) to flow into the FB pin
and out of the OFS pin. If R OFS is connected to ground, the
voltage across it is regulated to 0.3V, and I OFS flows into the
OFS pin and out of the FB pin. The offset current flowing
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product
(I OFS x R FB ). These functions are shown in Figures 9
and 10.
FIGURE 8. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
Load-Line (Droop) Regulation
Once the desired output offset voltage has been determined,
use Equations 14 and 15 to set R OFS :
For Positive Offset (connect R OFS to GND):
R OFS = --------------------------
R OFS = --------------------------
By adding a well controlled output impedance, the output
voltage can effectively be level shifted in a direction which
works to achieve a cost-effective solution can help to reduce
the output-voltage spike that results from fast load-current
demand changes.
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
0.3 × R FB
V OFFSET
For Negative Offset (connect R OFS to VCC):
1.6 × R FB
V OFFSET
VDIFF
-
(EQ. 14)
(EQ. 15)
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
V OFS
+
R FB
VREF
+
E/A
crossing the upper specification limit.
FB
-
As shown in Figure 8, with the FS resistor tied to ground, the
average current of all active channels, I AVG , flows from FB
through a load-line regulation resistor R FB . The resulting
voltage drop across R FB is proportional to the output current,
effectively creating an output voltage droop with a steady-
state value defined as in Equation 12:
I OFS
VCC
-
+
-
V DROOP = I AVG ? R FB
(EQ. 12)
R OFS
+
-
1.6V
+
+
The regulated output voltage is reduced by the droop voltage
V DROOP . The output voltage as a function of load current is
shown in Equation 13.
OFS
ISL6323
-
GND
0.3V
VCC
FIGURE 9. NEGATIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
19
FN9278.5
May 17, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6323CRZR5285 | 制造商:Intersil Corporation 功能描述: |
| ISL6323CRZ-T | 功能描述:IC HYBRID CTRLR PWM MONO 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6323EVAL1Z | 功能描述:EVAL BOARD 1 FOR ISL6323 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6323IRZ | 功能描述:IC HYBRID CTRLR PWM MONO 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6323IRZ-T | 功能描述:IC HYBRID CTRLR PWM MONO 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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