参数资料
| 型号： | ISL6323CRZ |
| 厂商： | Intersil |
| 文件页数： | 31/36页 |
| 文件大小： | 0K |
| 描述： | IC HYBRID CTRLR PWM MONO 48-QFN |
| 标准包装： | 43 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 最高 2V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
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ISL6323
R 1 = R FB ? --------------------------------------------
C 1 = --------------------------------------------
.
C ? ESR
L ? C – C ? ESR
L ? C – C ? ESR
R FB
must provide the transient energy until the regulator can
respond. Because it has a low bandwidth compared to the
switching frequency, the output filter limits the system
transient response. The output capacitors must supply or
sink load current while the current in the output inductors
increases or decreases to meet the demand.
0.75 ? V IN
C 2 = -----------------------------------------------------------------------------------------------------
HF ? ( L ? C ) ? R FB ? V P-P
( 2 ? π ) 2 ? f ? f
0
(EQ. 52)
In high-speed converters, the output capacitor bank is usually
the most costly (and often the largest) part of the circuit.
Output filter design begins with minimizing the cost of this part
V P-P ? ? 2 π ? ? f 0 ? f HF ? L ? C ? R FB
R C = ------------------------------------------------------------------------------------------
0.75 ? V ? ( 2 ? π ? f HF ? L ? C – 1 )
0.75 ? V IN ? ( 2 ? π ? f HF ? L ? C – 1 )
( 2 ? π ) 2 ? f 0 ? f HF ? ( L ? C ) ? R FB ? V P-P
2
? ?
IN
C C = -----------------------------------------------------------------------------------------------------
In the solutions to the compensation equations, there is a
single degree of freedom. For the solutions presented in
Equation 53, R FB is selected arbitrarily. The remaining
compensation components are then selected according to
Equation 53.
In Equation 53, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V P-P is the
peak-to-peak sawtooth signal amplitude as described in
of the circuit. The critical load parameters in choosing the
output capacitors are the maximum size of the load step, Δ I,
the load-current slew rate, di/dt, and the maximum allowable
output-voltage deviation under transient loading, Δ V MAX .
Capacitors are characterized according to their capacitance,
ESR, and ESL (equivalent series inductance).
At the beginning of the load transient, the output capacitors
supply all of the transient current. The output voltage will
initially deviate by an amount approximated by the voltage
drop across the ESL. As the load current increases, the
voltage drop across the ESR increases linearly until the load
current reaches its final value. The capacitors selected must
have sufficiently low ESL and ESR so that the total output
voltage deviation is less than the allowable maximum.
Neglecting the contribution of inductor current and regulator
response, the output voltage initially deviates by an amount
as shown in Equation 54:
Δ V ≈ ESL ? ----- + ESR ? Δ I
Output Filter Design
di
dt
(EQ. 54)
-------------------------------- > f 0
2 ? π ? f 0 ? V P-P ? L ? C
R C = R FB ? ----------------------------------------------------------
0.66 ? V IN
2 ? π ? V P-P ? R FB ? f 0
-------------------------------- ≤ f 0 < -------------------------------------
Case 1:
Case 2:
1
2 ? π ? L ? C
0.66 ? V IN
C C = ------------------------------------------------------
1 1
2 ? π ? L ? C 2 ? π ? C ? ESR
The filter capacitor must have sufficiently low ESL and ESR
so that Δ V < Δ V MAX .
Most capacitor solutions rely on a mixture of high frequency
capacitors with relatively low capacitance in combination
with bulk capacitors having high capacitance but limited
high-frequency performance. Minimizing the ESL of the
high-frequency capacitors allows them to support the output
voltage as the current increases. Minimizing the ESR of the
V P-P ? ( 2 ? π ) 2 ? f 02 ? L ? C
R C = R FB ? ------------------------------------------------------------------
( 2 ? π ) 2 ? f 02 ? V P-P ? R FB ? L ? C
0.66 ? V IN
0.66 ? V IN
C C = ---------------------------------------------------------------------------------------
(EQ. 53)
bulk capacitors allows them to supply the increased current
with less output voltage deviation.
The ESR of the bulk capacitors also creates the majority of
the output-voltage ripple. As the bulk capacitors sink and
source the inductor AC ripple current (see “Interleaving” on
f 0 > -------------------------------------
R C = R FB ? ----------------------------------------------
0.66 ? V IN ? ESR ? C
2 ? π ? V P-P ? R FB ? f 0 ? L
IN – N ? V OUT ? V OUT
? V ?
? ?
L ≥ ESR ? --------------------------------------------------------------------
Case 3:
1
2 ? π ? C ? ESR
2 ? π ? f 0 ? V P-P ? L
0.66 ? V IN ? ESR
C C = ------------------------------------------------------------------
capacitor ESR equal to I C(P-P ) (ESR). Thus, once the output
capacitors are selected, the maximum allowable ripple
voltage, V P-P(MAX) , determines the lower limit on the
inductance.
(EQ. 55)
f S ? V IN ? V P-P(MAX)
The output inductors and the output capacitor bank together
to form a low-pass filter responsible for smoothing the
pulsating voltage at the phase nodes. The output filter also
31
Since the capacitors are supplying a decreasing portion of
the load current while the regulator recovers from the
FN9278.5
May 17, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6323CRZR5285 | 制造商:Intersil Corporation 功能描述: |
| ISL6323CRZ-T | 功能描述:IC HYBRID CTRLR PWM MONO 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6323EVAL1Z | 功能描述:EVAL BOARD 1 FOR ISL6323 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6323IRZ | 功能描述:IC HYBRID CTRLR PWM MONO 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6323IRZ-T | 功能描述:IC HYBRID CTRLR PWM MONO 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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