参数资料
| 型号： | ISL6324ACRZ |
| 厂商： | Intersil |
| 文件页数： | 22/40页 |
| 文件大小： | 0K |
| 描述： | IC HYBRID CTRLR PWM DUAL 48QFN |
| 标准包装： | 43 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 最高 2V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
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ISL6324A
Phase Detection
The ISEN3- and ISEN4- pins are monitored prior to soft-start
to determine the number of active CORE channel phases.
.
If ISEN4- is tied to VCC, the controller will configure the
channel firing order and timing for 3-phase operation. If
ISEN3- and ISEN4- are tied to VCC, the controller will set
the channel firing order and timing for 2-phase operation
(see “PWM Operation” on page 13 for details). If Channel 4
V NB
400mV/DIV
TDA
TDB
V CORE
400mV/DIV
and/or Channel 3 are disabled, then the corresponding
PWMn and ISENn+ pins may be left unconnected
Soft-Start Output Voltage Targets
Once the POR and Phase Detect blocks and enable
comparator are satisfied, the controller will begin the
soft-start sequence and will ramp the CORE and NB output
voltages up to the SVI interface designated target level if the
controller is set SVI mode. If set to PVI mode, the North
Bridge regulator is disabled and the core is soft started to the
level designated by the parallel VID code.
SVI MODE
Prior to soft-starting both CORE and NB outputs, the
ISL6324A must check the state of the SVI interface inputs to
determine the correct target voltages for both outputs. When
the controller is enabled, the state of the VFIXEN, SVD and
SVC inputs are checked and the target output voltages set
for both CORE and NB outputs are set by the DAC (see
only change if the EN signal is pulled low or after a POR
reset of VCC.
Soft-Start
The soft-start sequence is composed of three periods, as
shown in Figure 11. At the beginning of soft-start, the DAC
immediately obtains the output voltage targets for both
outputs by decoding the state of the SVI or PVI inputs. A
100μs fixed delay time, TDA, proceeds the output voltage
rise. After this delay period the ISL6324A will begin ramping
both CORE and NB output voltages to the programmed DAC
level at a fixed rate of 3.25mV/μs. The amount of time
required to ramp the output voltage to the final DAC voltage
is referred to as TDB, and can be calculated as shown in
Equation 17.
EN
5V/DIV
VDDPWRGD
5V/DIV
100μs/DIV
FIGURE 11. SOFT-START WAVEFORMS
Pre-Biased Soft-Start
The ISL6324A also has the ability to start up into a
pre-charged output, without causing any unnecessary
disturbance. The FB pin is monitored during soft-start, and
should it be higher than the equivalent internal ramping
reference voltage, the output drives hold both MOSFETs off.
Once the internal ramping reference exceeds the FB pin
potential, the output drives are enabled, allowing the output to
ramp from the pre-charged level to the final level dictated by
the DAC setting. Should the output be pre-charged to a level
exceeding the DAC setting, the output drives are enabled at
the end of the soft-start period, leading to an abrupt correction
in the output voltage down to the DAC-set level.
Both CORE and NB output support start up into a
pre-charged output.
OUTPUT PRECHARGED
ABOVE DAC LEVEL
OUTPUT PRECHARGED
BELOW DAC LEVEL
V CORE
400mV/DIV
V DAC
3.25 × 10
TDB = ------------------------------
– 3
After the DAC voltage reaches the final VID setting,
VDDPWRGD will be set to high.
22
(EQ. 17)
EN
5V/DIV
100μs/DIV
FIGURE 12. SOFT-START WAVEFORMS FOR
ISL6324A-BASED MULTI-PHASE CONVERTER
FN6880.2
May 14, 2010
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6324ACRZR5381 | 制造商:Intersil Corporation 功能描述:4+1 PHASE CONTROLLER, CORE+NORTHBRIDGE, PROG PSI, 3.4MHZ SVI - Rail/Tube 制造商:Intersil Corporation 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN |
| ISL6324ACRZ-T | 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6324ACRZ-TR5381 | 制造商:Intersil Corporation 功能描述:4+1 PHASE CONT., CORE + NORTHBRIDGE, PROG PSI, 3.4MHZ SVI, 5 - Tape and Reel 制造商:Intersil Corporation 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN |
| ISL6324AIRZ | 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6324AIRZR5381 | 制造商:Intersil Corporation 功能描述:4+1 PHASE CONTROLLER, CORE + NORTHBRIDGE, PROG PSI, 3.4MHZ S - Rail/Tube 制造商:Intersil Corporation 功能描述:IC HYBRID CTRLR PWM DUAL 48QFN |
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