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| 型号： | ISL6327IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 13/29页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 48-QFN |
| 标准包装： | 4,000 |
| PWM 型： | 控制器 |
| 输出数： | 6 |
| 频率 - 最大： | 1MHz |
| 占空比： | 25% |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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ISL6327
Voltage Regulation
The compensation network shown in Figure 5 assures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6327 to include the combined tolerances of each of
these elements.
The output of the error amplifier, V COMP , is compared to the
sawtooth waveforms to generate the PWM signals. The PWM
signals control the timing of the Intersil MOSFET drivers and
regulate the converter output to the specified reference
voltage. The internal and external circuitries, which control the
voltage regulation, are illustrated in Figure 5.
The ISL6327 incorporates an internal differential remote-sense
amplifier in the feedback path. The amplifier removes the
voltage error encountered when measuring the output voltage
relative to the local controller ground reference point resulting in
a more accurate means of sensing output voltage. Connect the
microprocessor sense pins to the non-inverting input, VSEN,
and inverting input, RGND, of the remote-sense amplifier. The
Load-Line Regulation
Some microprocessor manufacturers require a precisely
controlled output resistance. This dependence of the output
voltage on the load current is often termed “droop” or “load
line” regulation. By adding a well controlled output
impedance, the output voltage can effectively be level shifted
in a direction which works to achieve the load-line regulation
required by these manufacturers.
In other cases, the designer may determine that a more
cost-effective solution can be achieved by adding droop.
Droop can help to reduce the output-voltage spike that
results from the fast changes of the load-current demand.
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
TABLE 2. VR10 VID TABLE (WITH 6.25mV EXTENSION)
remote-sense output, V DIFF , is connected to the inverting input
of the error amplifier through an external resistor.
VID4
400mV
VID3
200mV
VID2
100mV
VID1
50mV
VID0
25mV
VID5 VID6
12.5mV 6.25mV
VOLTAGE
(V)
A digital-to-analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID7
through VID0. The DAC decodes the 8-bit logic signal (VID)
into one of the discrete voltages shown in Table 3. Each VID
input offers a 45μA pull-up to an internal 2.5V source for use
with open-drain outputs. The pull-up current diminishes to
zero above the logic threshold to protect voltage-sensitive
output devices. External pull-up resistors can augment the
pull-up current sources in case the leakage into the driving
device is greater than 45μA.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1.6
1.59375
1.5875
1.58125
1.575
1.56875
1.5625
1.55625
EXTERNAL CIRCUIT
ISL6327 INTERNAL CIRCUIT
0
1
1
0
0
1
1
1.55
R C
C C
COMP
DAC
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1.54375
1.5375
R REF
C REF
REF
+
0
0
1
1
1
1
0
0
1
1
0
1
0
1
1.53125
1.525
0
1
1
0
1
1
0
1.51875
FB
-
V COMP
0
1
1
1
0
0
1
1.5125
R FB
+
V DROOP
-
IDROOP
VDIFF
I AVG
ERROR AMPLIFIER
0
0
1
1
1
1
1
1
0
0
0
1
0
1
1.50625
1.5
0
1
1
1
0
1
0
1.49375
V OUT +
V OUT -
VSEN
RGND
+
-
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
1
1.4875
1.48125
1.475
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 5. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
0
1
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
1
0
1.46875
1.4625
1.45625
13
FN9276.4
May 5, 2008
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| ISL6328ACRZ | 功能描述:IC VOLTAGE REGULATOR RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:* 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6328ACRZ-T | 功能描述:IC VOLTAGE REGULATOR RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:* 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6328AIRZ | 功能描述:IC VOLTAGE REGULATOR RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:* 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6328AIRZ-T | 功能描述:IC VOLTAGE REGULATOR RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:* 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6328CRZ | 功能描述:IC CTRLR PWM SYNC BUCK DL 48QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:2,000 系列:- 应用:控制器，DSP 输入电压:4.5 V ~ 25 V 输出数:2 输出电压:最低可调至 1.2V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:30-TFSOP（0.173"，4.40mm 宽） 供应商设备封装:30-TSSOP 包装:带卷 (TR) |
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