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参数资料
| 型号： | ISL6341IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 6/17页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 10-TDFN |
| 标准包装： | 6,000 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 330kHz |
| 占空比： | 85% |
| 电源电压： | 4.5 V ~ 14.4 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
ISL6341, ISL6341A, ISL6341B, ISL6341C
Pulling COMP/EN low (V ENABLE = 0.7V nominal) will
disable the controller, which causes the oscillator to stop, the
LGATE and UGATE outputs to be held low, and the soft-start
circuitry to re-arm. The external pull-down device will initially
need to overcome up to 5mA of COMP/EN output current.
Functional Description
TABLE 1. SUMMARY OF FEATURE DIFFERENCES
MAX
DUTY
However, once the IC is disabled, the COMP output will also
be disabled, so only a 20μA current source will continue to
draw current.
PART
NUMBER
ISL6341
f SW
(kHz)
300
CYCLE
(%)
85
OCP
(OVERCURRENT PROTECTION)
Latch off; toggle POR or COMP/EN
to restart
When the pull-down device is released, the COMP/EN pin will
start to rise, at a rate determined by the 20μA charging up the
capacitance on the COMP/EN pin. When the COMP/EN pin
ISL6341A
ISL6341B
600
600
75
75
“Hiccup” mode (infinite retries)
Latch off; toggle POR or COMP/EN
rises above the V ENABLE trip point, the ISL6341x will begin a
to restart
new initialization and soft-start cycle.
ISL6341C
300
85
“Hiccup” mode (infinite retries); UVP
LGATE/OCSET (Pin 4)
Connect this pin to the gate of the lower MOSFET; it provides
the PWM-controlled gate drive (from V CC ). This pin is also
monitored by the adaptive shoot-through protection circuitry to
determine when the lower MOSFET has turned off.
During a short period of time following Power-On Reset
(POR) or shut-down release, this pin is also used to
determine the overcurrent threshold of the converter.
Connect a resistor (R OCSET ) from this pin to GND. See
Table 1 for summary of overcurrent responses. Some of the
text describing the LGATE function may leave off the
OCSET part of the name when it is not relevant to the
discussion.
PGOOD (Pin 10)
This output is an open-drain pull-down device that reflects
the state of the PGOOD comparators. An external pull-up
resistor should be connected to a supply ≤ 6V. The output will
be held low through the soft-start ramp, and is allowed to go
high at the end of soft-start, if the VOS voltage is within its
window. The PGOOD window is tighter than the OV or UV
protection window, to give an early warning of a problem.
The PGOOD does respond directly to an OCP condition, but
may also go low if V OUT drops low enough before an OCP
trip.
Figure 1 shows a simplified timing diagram. The
Power-On-Reset (POR) function continually monitors the
bias voltage at the VCC pin. Once the rising POR threshold
is exceeded (V POR = 4.3V nominal), the POR function
initiates the Overcurrent Protection (OCP) sample and hold
operation (while COMP/EN is ~1V). When the sampling is
complete, V OUT begins the soft-start ramp.
6
is disabled
Initialization (POR and OCP Sampling)
V CC (2V/DIV)
~4.3V POR
V OUT (1V/DIV)
COMP/EN (1V/DIV)
GND>
FIGURE 1. POR AND SOFT-START OPERATION
If the COMP/EN pin is held low during power-up, that will just
delay the initialization until it is released and the COMP/EN
voltage is above the V ENABLE trip point.
Figure 2 shows a typical power-up sequence in more detail.
The initialization starts at t0, when either V CC rises above
V POR , or the COMP/EN pin is released (after POR). The
COMP/EN will be pulled up by an internal 20μA current
source, but the timing will not begin until the COMP/EN
exceeds the V ENABLE trip point (at t1). The external
capacitance of the disabling device, as well as the
compensation capacitors, will determine how quickly the
20μA current source will charge the COMP/EN pin. With
typical values, it should add a small delay compared to the
soft-start times. The COMP/EN will continue to ramp to ~1V.
FN6538.2
December 2, 2008
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