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参数资料
| 型号： | ISL6551ABZ-T |
| 厂商： | Intersil |
| 文件页数： | 3/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBACK PWM 28-SOIC |
| 标准包装： | 1,000 |
| PWM 型： | 电流模式 |
| 输出数： | 6 |
| 频率 - 最大： | 1MHz |
| 占空比： | 50% |
| 电源电压： | 10.8 V ~ 13.2 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 包装： | 带卷 (TR) |
ISL6551
Functional Pin Description
PACKAGE PIN #
SOIC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19, 20
21, 22
23, 24
25
26, 27
28
QFN
26
27
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16, 17
18, 19
20, 21
22
23, 24
25
PIN SYMBOL
VSS
CT
RD
R_RESDLY
R_RA
ISENSE
PKILIM
BGREF
R_LEB
CS_COMP
CSS
EANI
EAI
EAO
SHARE
LATSD
DCOK
ON/OFF
SYNC2, SYNC1
LOWER2, LOWER1
UPPER2, UPPER1
PGND
VDDP2, VDDP1
VDD
3
FUNCTION
Reference ground. All control circuits are referenced to this pin.
Set the oscillator frequency, up to 1MHz.
Adjust the clock dead time from 50ns to 1000ns.
Program the resonant delay from 50ns to 500ns.
Adjust the ramp for slope compensation (from 50mV to 250mV).
The pin receives the current information via a current sense transformer or a power resistor.
Set the over current limit with the bandgap reference as the trip threshold.
Precision bandgap reference, 1.263V ±2% overall recommended operating conditions.
Program the leading edge blanking from 50ns to 300ns.
Set a low current sharing loop bandwidth with a capacitor.
Program the rise time and the clamping voltage with a capacitor and a resistor, respectively.
Non-inverting input of Error Amp. It is clamped by the voltage at the CSS pin (Vclamp).
Inverting input of Error Amp. It receives the feedback voltage.
Output of Error Amp. It is clamped by the voltage at the CSS pin (Vclamp).
This pin is the SHARE BUS connecting with other unit(s) for current share operation.
The IC is latched off with a voltage greater than 3V at this pin and is reset by recycling VDD.
Power Good indication with a ±5% window.
This is an Enable pin that controls the states of all drive signals and the soft-start.
These are the gate control signals for the output synchronous rectifiers.
Both lower drivers are PWM-controlled on the trailing edge.
Both upper drivers are driven at a fixed 50% duty cycle.
Power Ground. High current return paths for both the upper and the lower drivers.
Power is delivered to both the upper and the lower drivers through these pins.
Power is delivered to all control circuits including SYNC1 & SYNC2 via this pin.
FN9066.5
January 3, 2006
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6551AR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6551AR-T | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6551ARZ | 功能描述:IC REG CTRLR FLYBACK PWM 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6551ARZ-T | 功能描述:IC REG CTRLR FLYBACK PWM 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6551EVAL1 | 功能描述:EVALUATION BOARD ISL6551 RoHS:否 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
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