参数资料
型号: ISL6565BCV-T
厂商: Intersil
文件页数: 12/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 28TSSOP
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.5MHz
占空比: 66.7%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 105°C
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
包装: 带卷 (TR)
ISL6565A, ISL6565B
DS ( ON )
I n
I
r
R
SEN = I L --------------------------
ISEN
V IN
CHANNEL N
UPPER MOSFET
I L
If the R-C network components are selected such that the
RC time constant matches the inductor L/DCR time
constant, then V C is equal to the voltage drop across the
DCR multiplied by the ratio of the resistor divider, K. If a
resistor divider is not being used, the value for K is 1 .
SAMPLE
&
HOLD
ISEN(n)
V IN
I
L
L DS ( ON )
-
+
R ISEN
CHANNEL N
-
+
I
r
ISL6605
L
DCR
INDUCTOR
V L (s)
V OUT
C OUT
LOWER MOSFET
V C (s)
ISL6565A INTERNAL CIRCUIT
EXTERNAL CIRCUIT
PWM(n)
R 1
C
FIGURE 4. ISL6565A INTERNAL AND EXTERNAL CURRENT-
SENSING CIRCUITRY
ISL6565B INTERNAL CIRCUIT
R 2*
INDUCTOR DCR SENSING (ISL6565B ONLY)
Inductor windings have a characteristic distributed
I n
V C (s)
R ISEN
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 5. The channel current
I L , flowing through the inductor, passes through the DCR.
Equation 5 shows the s-domain equivalent voltage, V L ,
across the inductor.
SAMPLE
&
HOLD
+
-
ISEN(n)
ICOMMON
V L ( s ) = I L ? ( s ? L + DCR )
(EQ. 5)
I SEN
*R 2 is OPTIONAL
? ------------- + 1 ?
s ? L
? DCR
?
( s ? R 1 ? C + 1 )
A simple R-C network across the inductor (R 1 and C)
extracts the DCR voltage, as shown in Figure 5. The voltage
across the sense capacitor, V C , can be shown to be
proportional to the channel current I L , shown in Equation 6.
(EQ. 6)
V C ( s ) = -------------------------------------- ? DCR ? I L
In some cases it may be necessary to use a resistor divider
R-C network to sense the current through the inductor. This
FIGURE 5. DCR SENSING CONFIGURATION
The capacitor voltage V C , is then replicated across the
sense resistor R ISEN . The regulator should have only one
R ISEN resistor connected from the V OUT plane to the
ICOMMON pin . The current through R ISEN is proportional to
the inductor current. Equation 9 shows that the proportion
between the channel current and the sensed current (I SEN )
is driven by the value of the sense resistor chosen, the
resistor divider ratio, and the DCR of the inductor.
I n = K ? I L ? ------------------
can be accomplished by placing a second resistor, R 2 ,
across the sense capacitor. In these cases the voltage
DCR
R ISEN
(EQ. 9)
? ------------- + 1 ?
s ? L
? DCR
?
V C ( s ) = -------------------------------------------------------- ? K ? DCR ? I L
? ( R 1 ? R 2 ) ?
R 1 + R 2
across the sense capacitor, V C , becomes proportional to the
channel current I L , and the resistor divider ratio, K.
(EQ. 7)
? s ? ------------------------ ? C + 1 ?
? ?
Channel-Current Balance
The sampled currents, I n , from each active channel are
summed together and divided by the number of active
channels. The resulting cycle average current, I AVG ,
provides a measure of the total load-current demand on the
converter during each switching cycle. Channel-current
balance is achieved by comparing the sampled current of
R 2
K = ---------------------
R 2 + R 1
12
(EQ. 8)
each channel to the cycle average current, and making the
proper adjustment to each channel pulse width based on the
error. Intersil’s patented current-balance method is illustrated
in Figure 6, with error correction for channel 1 represented.
In the figure, the cycle average current combines with the
channel 1 sample, I 1 , to create an error signal I ER .
FN9135.4
December 1, 2005
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