参数资料
型号: ISL8120EVAL3Z
厂商: Intersil
文件页数: 28/35页
文件大小: 0K
描述: EVALUATION BOARD FOR ISL8120
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 2,非隔离
输出电压: 1.2V,1.2V
电流 - 输出: 2 x 25A 或 1 x 50A
输入电压: 3 ~ 22 V
稳压器拓扑结构: 降压
频率 - 开关: 150kHz ~ 1.5MHz
板类型: 完全填充
已供物品:
已用 IC / 零件: ISL8120
ISL8120
For multiphase implementation, one single error amplifier
should be used for the voltage loop. Therefore, all other
channels’ error amplifiers should be disabled with their
corresponding VSEN- pulled to VCC, as shown in Figure 16.
Current Share Control Loop in Multi-Module with
Independent Voltage Loop
The power module controlled by ISL8120 with its own
voltage loop can be paralleled to supply one common output
load with its integrated Master-Slave current sharing control,
page 11. A resistor R CSR needs to be inserted between
VSEN1- pin and the lower resistor of the voltage sense
resistor divider for each module. With this resistor, the
correction current sourcing from VSEN1- pin will create a
voltage offset to maintain even current sharing among
modules. The recommended value for the VSEN1- resistor
R CSR is 100 Ω and it should not be large in order to keep the
unity gain amplifier input pin impedance compatibility. The
maximum source current from VSEN1- pin is 350μA, which
ISHARE
VCC
is combined with R CSR to determine the current sharing
regulation range. The generated correction voltage on R CSR
is suggested to be within 5% of VREF (0.6V) to avoid fault
triggering of UV/OV and PGOOD during dynamic events.
There are basically two options for the configuration of the
communication wires between the modules. Each of option
has its own unique features.
One option is to synchronize all the modules where the
system has 3 analog signal communication wires (CLKOUT-
SYNC, ISHARE, EN/FF). In this option, all the modules are
synchronized and the phase shift can also be configured to
optimal to reduce the input current ripple by interleaving
effects. The connections of these three wires allows the
system to be started at the same time and achieve good
current balance in start-up without overcurrent trip. To have
different phase shift, each module has different circuitry
configuration to program the phase shift, thus to make only
one standard module is difficult.
ISL8120
R1
R3
10k
R4
10k
COMP
1k
Q1
Q2
Q3
ISHARE BUS
R2
V OUT
GND
GND
ISHARE
VCC
3.3k
MODULE 1
GND
ISL8120
R1
R3
10k
R4
10k
1k
COMP
Q1
Q2
Q3
ISHARE BUS
R2
GND
3.3k
GND
MODULE 2
Q1: MMBT3904
Q2: MMBT3904
Q3: 2N7002
FIGURE 15. SINGLE COMMUNICATION WIRE CONNECTION
28
March 20, 2009
FN6641.0
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ISL8120IRZ-T 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
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