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| 型号： | ISL85402IRZ-TK |
| 厂商： | Intersil |
| 文件页数： | 18/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BOOST SYNC ADJ 20QFN |
| 标准包装： | 1,000 |
| 类型： | 降压（降压），升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 可调至 0.8V |
| 输入电压： | 3 V ~ 36 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 200kHz ~ 2.2MHz |
| 电流 - 输出： | 2.5A |
| 同步整流器： | 两者兼有 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-QFN（4x4） |
ISL85402
PWM Comparator Gain F m :
If T i (S)>>1, then Equation 23 can be simplified as Equation 24:
F m = ---------------- = ------------------------------
1 + ------------
L v ( S ) = ----------------------- ---------------------- --------------- , ω p ≈ -------------
The PWM comparator gain Fm for peak current mode control is
given by Equation 16:
?
d 1 (EQ. 16)
?
v comp ( S e + S n ) T s
S
R o + R LP ω esr A v ( S ) 1
S
R t 1 + ------- H e ( S ) R o C o
ω p
(EQ. 24)
Where, S e is the slew rate of the slope compensation and S n is
given by Equation 17:
V in – V o (EQ. 17)
L
S n = R t --------------------
P
Equation 24 shows that the system is a single order system.
Therefore, a simple type II compensator can be easily used to
stabilize the system. A type III compensator is needed to expand
the bandwidth for current mode control in some cases.
S
S
H e ( S ) = ------- + -------------- + 1
ω n Q n
ω n
where, R t is the gain of the current amplifier.
CURRENT SAMPLING TRANSFER FUNCTION H E (S):
In current loop, the current signal is sampled every switching
cycle. It has the following transfer function in Equation 18:
2
(EQ. 18)
2
V COMP
R2
C1
V REF
R3
R BIAS
R1
C3
V O
Q n = – --- , ω n = π f s
where, Q n and ω n are given by
2
π
1 + ------------
v o ω esr (EQ. 19)
F 1 ( S ) = ------ = V in --------------------------------------
d ?
------- + -------------- + 1
ω o Q p
ω o
1
1
Where, ω esr = ------------- , Q p ≈ R o ----- o - , ω o = -----------------
1 + ------
F 2 ( S ) = --- ? - = ----------------------- --------------------------------------
R o + R LP
d
S
S
ω o Q p
------- + -------------- + 1
ω o
? 1 + ------------ ? ? 1 + ------------ ?
ω cz1
ω cz2
v ? comp
? ? ? ?
A v ( S ) = ---------------- = ------------------ ---------------------------------------------------------
SR 1 C
v ? O
? 1 + ---------- ?
S
?
ω ?
ω cz1 = -------------- , ω cz2 = -------------------------------- , ω cp = --------------
Loop bandwidth f c : ? 4 --- to ------- ? f s
where ω z = ------------- .
Power Stage Transfer Functions
Transfer function F 1 (S) from control to output voltage is:
S
S S
2
C
R c C o L P L P C o
Transfer function F 2 (S) from control to inductor current is given
by Equation 20:
S
I
? o V in ω z (EQ. 20)
2
2
1
R o C o
FIGURE 30. TYPE III COMPENSATOR
A type III compensator with 2 zeros and 1 pole is recommended
for this part, as shown in Figure 30. Its transfer function is
expressed as Equation 25:
S S
1 (EQ. 25)
1
cp
where ,
1 1 1
R 2 C 1 ( R 1 + R 3 ) C 3 R 3 C 3
Compensator design goal:
? 1 1 ?
10
Gain margin: >10dB
Phase margin: 45°
Current loop gain T i (S) is expressed as Equation 21:
T i ( S ) = R t F m F 2 ( S ) H e ( S )
(EQ. 21)
The compensator design procedure is as follows:
1. Position ω CZ2 and ω CP to derive R 3 and C 3 .
The voltage loop gain with open current loop is expressed in
Put the compensator zero ω CZ2 at (1 to 3)/(R o C o )
ω cz2 = -------------
Equation 22:
T v ( S ) = KF m F 1 ( S ) A v ( S )
(EQ. 22)
3
R o C o
(EQ. 26)
The Voltage loop gain with current loop closed is given by
Equation 23:
Put the compensator pole ω CP at ESR zero or 0.35 to 0.5 times
of switching frequency, whichever is lower. In all-ceramic-cap
design, the ESR zero is normally higher than half of the switching
L v ( S ) = -----------------------
Case A: ESR zero --------------------- less than (0.35 to 0.5)f s
T v ( S )
1 + T i ( S )
18
(EQ. 23)
frequency. R 3 and C 3 can be derived as following:
1
2 π R c C o
FN7640.1
April 25, 2013
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