参数资料
型号: ISL9506HRZ-T
厂商: Intersil
文件页数: 17/27页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 40-QFN
标准包装: 4,000
系列: Robust Ripple Regulator™ (R³)
PWM 型: 控制器
输出数: 1
频率 - 最大: 500kHz
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -10°C ~ 100°C
封装/外壳: 40-VFQFN 裸露焊盘
包装: 带卷 (TR)
ISL9506
TABLE 1. VOLTAGE SELECTION TABLE (Continued)
VSEL5 VSEL4 VSEL3 VSEL2 VSEL1 VSEL0 VSEL6=0 VSEL6=1
TABLE 1. VOLTAGE SELECTION TABLE (Continued)
VSEL5 VSEL4 VSEL3 VSEL2 VSEL1 VSEL0 VSEL6=0 VSEL6=1
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
1.2625
1.2500
1.2375
1.2250
1.2125
0.4625
0.4500
0.4375
0.4250
0.4125
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
0.7625
0.7500
0.7375
0.7250
0.7125
OFF
OFF
OFF
OFF
OFF
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1.2000
1.1875
1.1750
1.1625
1.1500
1.1375
1.1250
1.1125
1.1000
1.0875
1.0750
1.0625
1.0500
1.0375
1.0250
1.0125
1.0000
0.9875
0.9750
0.9625
0.9500
0.9375
0.9250
0.9125
0.9000
0.8875
0.8750
0.8625
0.8500
0.8375
0.8250
0.8125
0.8000
0.7875
0.7750
0.4000
0.3875
0.3750
0.3625
0.3500
0.3375
0.3250
0.3125
0.3000
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
A differential amplifier allows voltage sensing for precise
voltage regulation at the point of load. The inputs to the
amplifier are the VSEN and RTN pins.
DROOP IMPEDANCE OR DROOP ACCOMPLISHMENT
As the load current increases from zero, the output voltage
will drop from the VSEL table value by an amount
proportional to load current to achieve certain droop
characteristics or droop impedance. The ISL9506 provides
for current to be sensed using resistors in series with the
channel inductors as shown in the application circuit of
Figure 40 or using the intrinsic series resistance of the
inductors as shown in the application circuit of Figure 39. In
both cases, signals representing the inductor currents are
summed at VSUM which is the non-inverting input to the
DROOP amplifier shown in the block diagram of Figure 41.
The voltage at the DROOP pin minus the output voltage at
VO pin is the total load current multiplied by a gain factor.
This value is used as an input to the differential amplifier to
achieve the desired droop impedance as well as the input of
the overcurrent circuit.
When using inductor DCR current sensing, a single NTC
element is used to compensate the positive temperature
coefficient of the copper winding thus sustaining the load-line
accuracy with reduced cost.
PHASE CURRENT BALANCE
In addition to the total current which is used for DROOP and
OCP, the individual channel average currents are also
monitored by the phase node voltage. Channel current
differences are sensed by comparing ISEN1, ISEN2, and
ISEN3 voltage. The IBAL circuit will adjust the channel
pulse-widths up or down relative to the other channels to
cause the voltages presented to the ISEN pins to be equal.
ENABLE AND DISABLE PHASES
The ISL9506 controller can be configured for three-, two- or
single-channel operation. To disable Channel 2 and/or
Channel 3, its PWM output pin should be tied to +5V and the
ISEN pins should be grounded. In three-channel operation,
the three-channel PWM's are phase shifted by 120°, and in
two-channel operation they are phase shifted by 180°.
17
FN6722.0
August 13, 2008
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