参数资料
| 型号： | ISL95874IRUZ-T |
| 厂商： | Intersil |
| 文件页数： | 18/29页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 1PHASE GPU 16UTQFN |
| 标准包装： | 3,000 |
| 应用： | 控制器，GPU 内核电源 |
| 输入电压： | 3.3 V ~ 25 V |
| 输出数： | 1 |
| 输出电压： | 0.5 V ~ 5 V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFQFN 裸露焊盘 |
| 供应商设备封装： | 16-UTQFN（2.6x1.8） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页当前第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页
ISL95874, ISL95875, ISL95876
TABLE 2. ISL95876 VID TRUTH TABLE
V OUT
R FB
FB
?
+
EA
+
V SET
?
V COMP
V REF
0.5V
VID STATE
VID1 VID0
1 1
1 0
0 1
0 0
CLOSE
SW0
SW1
SW2
SW3
RESULT
V SREF
V SET1
V SET2
V SET3
V SET4
V OUT
V OUT1
V OUT2
V OUT3
V OUT4
SREF
SW0
Equations 22, 23, 24 and 25 give the specific V SET equations for
the ISL95876 setpoint reference voltages.
V SET2 = V REF ? ? 1 + -------------------------------------------------------------- ?
V SET3 = V REF ? ? 1 + --------------------------------------- ?
SET0
SET1
R SET4
SW1
SW2
SW3
The ISL95876 V SET1 setpoint is written as Equation 22:
V SET1 = V REF
The ISL95876 V SET2 setpoint is written as Equation 23:
? R SET1 ?
? R SET2 + R SET3 + R SET4 ?
The ISL95876 V SET3 setpoint is written as Equation 24:
? R SET1 + R SET2 ?
? R SET3 + R SET4 ?
(EQ. 22)
(EQ. 23)
(EQ. 24)
V SET4 = V REF ? ? 1 + -------------------------------------------------------------- ?
FIGURE 11. ISL95875 OPTIONAL R SET4 RESISTOR
Output Voltage Programming for ISL95876
The ISL95876 V SET4 setpoint is written as Equation 25:
? R SET1 + R SET2 + R SET3 ?
? R SET4 ?
(EQ. 25)
V SETX = V REF ? ? ?
? R F ?
R IN ?
R SET1 = ---------------------------------------------------------------------------------
V REF ? V SET2
R SET2 = ------------------------------------------------------------------------------------
V SET2 ? V SET3
R SET3 = ----------------------------------------------------------------
V SET3
R SET1 + R SET2 + R SET3 + R SET4 ≥ 300k Ω
The ISL95876 allows the user to select four different reference
voltages, thus four different output voltages, by voltage
identification pins VID1 and VID0. The maximum reference
voltage cannot be designed higher than 1.5V. The
implementation scheme is shown in Figure 12. The setpoint
reference voltages are programmed with resistors that use the
naming convention R SET(x) where (x) is the first, second, third, or
fourth programming resistor connected in series starting at the
SREF pin and ending at the GND pin. As shown in Table 2,
different combinations of VID1 and VID0 close different switches
and leave other switches open. For example, for the case of VID1
= 1 and VID0 = 0, switch SW1 closes and all the other three
switches SW0, SW2 and SW3 are open. For one combination of
VID1 and VID0, the internal switch connects the inverting input of
the V SET amplifier to a specific node among the string of R SET
programming resistors. All the resistors between that node and
the SREF pin serve as the feedback impedance R F of the V SET
amplifier. Likewise, all the resistors between that node and the
GND pin serve as the input impedance R IN of the V SET amplifier.
Equation 21 gives the general form of the gain equation for the
V SET amplifier:
1 + --------- (EQ. 21)
?
Where:
- V REF is the 0.5V internal reference of the IC
- V SETx is the resulting setpoint reference voltage that
appears at the SREF pin
18
The V SET1 is fixed at 0.5V because it corresponds to the closure
of internal switch SW0 that configures the V SET amplifier as a
unity-gain voltage follower for the 0.5V voltage reference V REF .
The setpoint reference voltages use the naming convention
V SET(x) where (x) is the first, second, third, or fourth setpoint
reference voltage where:
- V SET1 < V SET2 < V SET3 < V SET4 Thus,
- V OUT1 < V OUT2 < V OUT3 < V OUT4
For the given four user selected reference voltages V SETx , the
programmed resistors R SET1 , R SET2 , R SET3 and R SET4 are
designed in the following way. First, assign an initial value to R SET4
of approximately 100k Ω then calculate R SET1, R SET2 and R SET3
using Equations 26, 27, and 28 respectively.
R SET4 ? V SET4 ? ( V SET2 – V REF )
(EQ. 26)
R SET4 ? V SET4 ? ( V SET3 – V SET2 )
(EQ. 27)
R SET4 ? ( V SET4 – V SET3 )
(EQ. 28)
The sum of all the programming resistors must be 300k Ω or
greater , as shown in Equation 29, otherwise adjust the value of
R SET4 and repeat the calculations.
(EQ. 29)
FN7933.1
March 2, 2012
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