参数资料
| 型号： | ISL95874IRUZ-T |
| 厂商： | Intersil |
| 文件页数： | 9/29页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 1PHASE GPU 16UTQFN |
| 标准包装： | 3,000 |
| 应用： | 控制器，GPU 内核电源 |
| 输入电压： | 3.3 V ~ 25 V |
| 输出数： | 1 |
| 输出电压： | 0.5 V ~ 5 V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFQFN 裸露焊盘 |
| 供应商设备封装： | 16-UTQFN（2.6x1.8） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页当前第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页
ISL95874, ISL95875, ISL95876
ISL95876 Functional Pin Descriptions
PIN NUMBER
1
2
3
4
5, 6, 7
8
9
10
11
12
13
14
15
16
17
18
19
20
Bottom Pad
SYMBOL
RTN
VID1
VID0
SREF
SET0, SET1,
SET2
FB
OCSET
VO
FSEL
PGOOD
EN
PHASE
UGATE
BOOT
VCC
PVCC
LGATE
PGND
GND
DESCRIPTION
Negative remote sense input of V OUT . If resistor divider consisting of R FB and R OFS is used at FB pin, the same
resistor divider should be used at RTN pin, i.e. keep R FB1 = R FB , and R OFS1 = R OFS .
Logic input for setpoint voltage selector. Use in conjunction with the VID0 pin to select among four setpoint reference
voltages.
Logic input for setpoint voltage selector. Use in conjunction with the VID1 pin to select among four setpoint reference
voltages.
Soft-start and voltage slew-rate programming capacitor input and setpoint reference voltage programming resistor
input. Connects internally to the inverting input of the V SET voltage setpoint amplifier.
Voltage set-point programming resistor input.
Voltage feedback sense input. Connects internally to the inverting input of the control-loop error transconductance
amplifier. The converter is in regulation when the voltage at the FB pin equals the voltage on the SREF pin.
Input for the overcurrent detection circuit. The overcurrent setpoint programming resistor R OCSET connects from this
pin to the sense node.
Output voltage sense input for the R 4 modulator. The VO pin also serves as the reference input for the overcurrent
detection circuit.
Input for programming the regulator switching frequency. Pull this pin to VCC for 1MHz switching. Pull this pin to GND
with a 100k Ω resistor for 600kHz switching. Leave this pin floating for 500kHz switching. Pull this pin directly to GND
for 300kHz switching.
Power-good open-drain indicator output. This pin changes to high impedance when the converter is able to supply
regulated voltage.
Enable input for the IC. Pulling EN above the rising threshold voltage initializes the soft-start sequence.
Return current path for the UGATE high-side MOSFET driver, V IN sense input for the R 4 modulator, and inductor
current polarity detector input.
High-side MOSFET gate driver output. Connect to the gate terminal of the high-side MOSFET of the converter.
Positive input supply for the UGATE high-side MOSFET gate driver. The BOOT pin is internally connected to the
cathode of the Schottky boot-strap diode. Connect an MLCC between the BOOT pin and the PHASE pin.
Input for the IC bias voltage. Connect +5V to the VCC pin and decouple with at least a MLCC to the GND pin.
Input for the LGATE and UGATE MOSFET driver circuits. The PVCC pin is internally connected to the anode of the
Schottky boot-strap diode. Connect +5V to the PVCC pin and decouple with a MLCC to the PGND pin.
Low-side MOSFET gate driver output. Connect to the gate terminal of the low-side MOSFET of the converter.
Return current path for the LGATE MOSFET driver. Connect to the source of the low-side MOSFET.
IC ground for bias supply and signal reference.
9
FN7933.1
March 2, 2012
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