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参数资料
| 型号： | KIT33996EKEVB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 10/24页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL 33996 16OUTPUT SW W/SPI |
| 标准包装： | 1 |
| 主要目的： | 电源管理，低端驱动器（内部 FET） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | MC33996 |
| 主要属性： | 16 输出，5 ~ 27V，0.9 ~ 2.5A，SPI 接口，PWM 接口 |
| 次要属性： | 0.55 欧 RdsON，温度，过压，短路保护 |
| 已供物品： | 板，CD |
| 相关产品： | MC33996EK-ND - IC SWITCH 16OUTPUT W/SPI 32-SOIC MC33996EKR2-ND - IC SWITCH 16-OTPT W/SPI 32-SOIC |
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
FUNCTIONAL DESCRIPTION
The 33996 is designed and developed for automotive and
industrial applications. It is a 16 output power switch having
24 bit serial control. The 33996 incorporates SMARTMOS
technology having CMOS logic, bipolar / MOS analog
circuitry, and independent DMOS power output transistors.
Many benefits are realized as a direct result of using this
mixed technology. A simplified internal block diagram of the
FUNCTIONAL PIN DESCRIPTION
CHIP SELECT (CS)
The system MCU selects the 33996 to be communicated
with through the use of the Chip Select ( CS ) pin. When the CS
pin is in a logic low state, data can be transferred from the
MCU to the 33996 and vise versa. Clocked-in data from the
MCU is transferred from the 33996 Shift register and latched
into the power outputs on the rising edge of the CS signal. On
the falling edge of the CS signal, output fault status
information is transferred from the Power Outputs Status
register into the device’s SO Shift register. The SO pin output
driver is enabled when CS is low, allowing information to be
transferred from the 33996 to the MCU. To avoid any
spurious data, it is essential the high-to-low transition of the
CS signal occur only when SCLK is in a logic low state.
SYSTEM CLOCK (SCLK)
The System Clock (SCLK) pin clocks the Internal Shift
registers of the 33996. The Serial Input (SI) pin accepts data
into the Input Shift register on the falling edge of the SCLK
signal, while the Serial Output (SO) pin shifts data information
out of the Shift register on the rising edge of the SCLK signal.
False clocking of the Shift register must be avoided, ensuring
validity of data. It is essential that the SCLK pin be in a logic
low state whenever the CS pin makes any transition. For this
reason, it is recommended, though not necessary, that the
SCLK pin is commanded to a low logic state as long as the
device is not accessed ( CS in logic high state). When the CS
is in a logic high state, any signal at the SCLK and SI pins is
ignored and the SO is tri-stated (high impedance).
SERIAL INPUT (SI)
The Serial Input (SI) pin is used to enter one of seven
serial instructions into the 33996. SI SPI bits are latched into
the Input Shift register on each falling edge of SCLK. The
Shift register is full after 24 bits of information are entered.
The 33996 operates on the command word on the rising edge
of CS . To preserve data integrity, exercise care not to
transition SI as SCLK transitions from high to low state (see
SERIAL OUTPUT (SO)
The Serial Output (SO) pin transfers fault status data from
the 33996 to the MCU. The SO pin remains tri-state until the
CS pin transitions to a logic low state. All faults on the 33996
are reported to the MCU as logic [1]. Conversely, normal
operating outputs with nonfaulted loads are reported as
status information is transferred from the Power Outputs
Status register into the device’s SO Shift register. The first
eight positive transitions of SCLK will provide Any Fault (bit
23), over-voltage fault (bit 22), followed by six logic [0]s (bits
21 to 16). The next 16 successive positive transitions of
SCLK provides fault status for output 15 to output 0. Refer to
the LOGIC OPERATION section (below) for more
information. The SI / SO shifting of data follows a first-in, first-
out protocol, with both input and output words transferring the
Most Significant Bit (MSB) first.
OUTPUT DRIVER POWER SUPPLY (SOPWR )
The SOPWR pin is used to supply power to the 33996 SO
output driver and Power-ON Reset (POR) circuit. To achieve
low standby current on VPWR supply, power must be
removed from the SOPWR pin. The 33996 will be in reset
with all drivers OFF when SO PWR is below 2.5V. The 33996
does not detect over-voltage on the SOPWR supply pin.
OUTPUT/INPUT (OUT0 – OUT15)
These pins are low side output switches controlling the
load.
RESET (RST)
The Reset ( RST ) pin is the active low reset input pin used
to turn OFF all outputs, thereby clearing all internal registers.
BATTERY INPUT (VPWR )
The VPWR pin is used as the input power source for the
33996. The voltage on VPWR is monitored for over-voltage
protection and shutdown. An over-voltage condition (> 50 μ s)
on the VPWR pin will cause the 33996 to shut down all
outputs until the over-voltage condition is removed. Upon
return to normal input voltage, the outputs will respond as
programmed by the over-voltage bit in the Global Shutdown /
Retry Control register. The over-voltage threshold on the
VPWR pin is specified as 27.5 to 35 V with 1.4V typical
hysteresis. Following an over-voltage shutdown of output
drivers, the over-voltage Fault and the Any Fault bits in the
SO bit stream will be logic [1].
PWM CONTROL (PWM)
The PWM Control pin is provided to support PWM of any
combination of outputs. The LOGIC OPERATION section
describes the logic for PWM control.
logic [0]. On the falling edge of the CS signal, output fault
33996
Analog Integrated Circuit Device Data
10
Freescale Semiconductor
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