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参数资料
| 型号： | KIT33996EKEVB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 20/24页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL 33996 16OUTPUT SW W/SPI |
| 标准包装： | 1 |
| 主要目的： | 电源管理，低端驱动器（内部 FET） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | MC33996 |
| 主要属性： | 16 输出，5 ~ 27V，0.9 ~ 2.5A，SPI 接口，PWM 接口 |
| 次要属性： | 0.55 欧 RdsON，温度，过压，短路保护 |
| 已供物品： | 板，CD |
| 相关产品： | MC33996EK-ND - IC SWITCH 16OUTPUT W/SPI 32-SOIC MC33996EKR2-ND - IC SWITCH 16-OTPT W/SPI 32-SOIC |
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
Introduction
This thermal addendum is provided as a supplement to the MC33996 technical
datasheet. The addendum provides thermal performance information that may be
critical in the design and development of system applications. All electrical,
application, and packaging information is provided in the datasheet.
Packaging and Thermal Considerations
The MC33996 is offered in a 32 pin SOICW exposed pad, single die package.
There is a single heat source (P), a single junction temperature (T J ), and thermal
resistance (R θ JA ).
33996EK
32-PIN
SOICW-EP
T J
=
R θ JA
.
P
EK (PB-FREE) SUFFIX
98ARL10543D
The stated values are solely for a thermal performance comparison of one
package to another in a standardized environment. This methodology is not meant
to and will not predict the performance of a package in an application-specific
environment. Stated values were obtained by measurement and simulation
according to the standards listed below.
Standards
Table 7. Thermal Performance Comparisons
32-PIN SOICW-EP
Note For package dimensions, refer to
the 33996 data sheet.
R θ JA
Thermal Resistance
[ ° C/W]
29
*All Measurements
are in Millimeters
1.0
R θ JB
9.0
1.0
R θ JA (1) , (4)
R θ JC (5)
69
2.0
0.2
0.2
Notes:
1. Per JEDEC JESD51-2 at natural convection, still air
condition.
2. 2s2p thermal test board per JEDEC JESD51-5 and
JESD51-7.
3. Per JEDEC JESD51-8, with the board temperature on the
center trace near the center lead.
4. Single layer thermal test board per JEDEC JESD51-3 and
JESD51-5.
5. Thermal resistance between the die junction and the
exposed pad surface; cold plate attached to the package
bottom side, remaining surfaces insulated.
32 Pin SOICW-EP
0.65 Pitch
11.0 mm x 7.5mm Body
4.6 mm x 5.7 mm Exposed Pad
Figure 14. Surface Mount for SOICW Exposed Pad
33996
Analog Integrated Circuit Device Data
20
Freescale Semiconductor
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