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参数资料
| 型号： | KIT33996EKEVB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 15/24页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL 33996 16OUTPUT SW W/SPI |
| 标准包装： | 1 |
| 主要目的： | 电源管理，低端驱动器（内部 FET） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | MC33996 |
| 主要属性： | 16 输出，5 ~ 27V，0.9 ~ 2.5A，SPI 接口，PWM 接口 |
| 次要属性： | 0.55 欧 RdsON，温度，过压，短路保护 |
| 已供物品： | 板，CD |
| 相关产品： | MC33996EK-ND - IC SWITCH 16OUTPUT W/SPI 32-SOIC MC33996EKR2-ND - IC SWITCH 16-OTPT W/SPI 32-SOIC |
TYPICAL APPLICATIONS
INTRODUCTION
TYPICAL APPLICATIONS
Power Consumption
The 33996 has been designed with one Sleep mode and
one Operational mode. In Sleep mode (SO PWR ≤ 2.0V) the
current consumed by the VPWR pin is less than 10 μ A. To
place the 33996 in Sleep mode, turn all outputs OFF and
remove power from the SOPWR pin. During normal
operation, 500 μ A is drawn from the SO PWR supply and 8.0mA
from the V PWR supply.
Paralleling of Outputs
Using MOSFETs as output switches allows the connection
of any combination of outputs together. The R DS(ON) of
MOSFETs has an inherent positive temperature coefficient,
providing balanced current sharing between outputs without
destructive operation. This mode of operation may be
desirable in the event the application requires lower power
dissipation or the added capability of switching higher
currents. Performance of parallel operation results in a
corresponding decrease in R DS(ON) , while the Output Current
Limit increases correspondingly. Output OFF Open Load
Detect current may increase based on how the Output OFF
Open Load Detect is programmed. Paralleling outputs from
two or more different IC devices is possible but not
recommended.
Care must be taken when paralleling outputs for inductive
loads. The Output Voltage Clamp of the output drivers may
not match. One MOSFET output must be capable of the
inductive energy from the load turn OFF.
SPI Integrity Check
Checking the integrity of the SPI communication is
recommended upon initial power-up of the SOPWR pin. After
initial system start-up or reset, the MCU writes one 48-bit
pattern to the 33996.
The first 24 bits read by the MCU is the fault status of the
outputs, while the second 24 bits is the first bit pattern sent.
By the MCU receiving the same bit pattern it sent, bus
integrity is confirmed. Please note the second 24 bits the
MCU sends to the 33996 are the command bits and will
program registers or activate outputs on the rising edge of
CS .
Output OFF Open Load Fault
An Output OFF Open Load Fault is the detection and
reporting of an open load when the corresponding output is
disabled (input bit programmed to a logic low state). The
Output OFF Open Load Fault is detected by comparing the
drain-to-source voltage of the specific MOSFET output to an
internally generated reference. Each output has one
dedicated comparator for this purpose.
Each 33996 output has an internal 50 μ A pull-down current
source. The pull-down current is disabled on power-up and
must be enabled for Open Load Detect to function. Once
enabled, the 33996 will only shut down the pull-down current
in Sleep mode or when disabled via the SPI.
During output switching, especially with capacitive loads,
a false Output OFF Open Load Fault may be triggered. To
prevent this false fault from being reported, an internal fault
filter of 100 to 450 μ s is incorporated. The duration for which
a false fault may be reported is a function of the load
impedance, R DS(ON) , C OUT of the MOSFET, as well as the
supply voltage, V PWR . The rising edge of CS triggers the built-
in fault delay timer. The timer must time out before the fault
comparator is enabled to detect a faulted threshold. Once the
condition causing the Open Load Fault is removed, the
device resumes normal operation. The Open Load Fault,
however, will be latched in the output SO Response register
for the MCU to read.
Shorted Load Fault
A shorted load (over-current) fault can be caused by any
output being shorted directly to supply, or by an output
experiencing a current greater than the current limit.
Three safety circuits progressively in operation during load
short conditions afford system protection:
1. The device’s output current is monitored in an analog
fashion using a SENSEFET approach and is current
limited.
2. With the output in current limit, the drain-to-source
voltage will increase. By setting the SFPD bit to 0, the
output will shut down on V DS > 2.7V typical after
450 μ s.
3. The device’s output thermal limit is sensed and when
attained causes only the specific faulted output to
shutdown. The device remains OFF until cooled. The
device then operates as programmed by the shutdown/
retry bit. The cycle continues until the fault is removed
or the command bit instructs the output OFF.
All three protection schemes set the Fault Status bit (bit 23
in the SO Response register) to logic [1].
Under-voltage Shutdown
An under voltage SO PWR condition results in the global
shutdown of all outputs and reset of all control registers. The
under-voltage threshold is between 2.0 and 3.0V.
An under-voltage condition at the VPWR pin results in an
output shutdown and reset. The under-voltage threshold is
between 3.2 and 3.5V. When V PWR is between 5.0 and 3.5V,
the output may operate per the command word and the status
is reported on SO pin, though this is not guaranteed.
Output Voltage Clamp
Each output of the 33996 incorporates an internal voltage
clamp to provide fast turn-OFF and transient protection of
each output. Each clamp independently limits the drain-to-
source voltage to 50V. The total energy clamped (E J ) can be
33996
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
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