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参数资料
| 型号： | KIT33996EKEVB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 4/24页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL 33996 16OUTPUT SW W/SPI |
| 标准包装： | 1 |
| 主要目的： | 电源管理，低端驱动器（内部 FET） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | MC33996 |
| 主要属性： | 16 输出，5 ~ 27V，0.9 ~ 2.5A，SPI 接口，PWM 接口 |
| 次要属性： | 0.55 欧 RdsON，温度，过压，短路保护 |
| 已供物品： | 板，CD |
| 相关产品： | MC33996EK-ND - IC SWITCH 16OUTPUT W/SPI 32-SOIC MC33996EKR2-ND - IC SWITCH 16-OTPT W/SPI 32-SOIC |
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted.
Rating
Symbol
Value
Unit
ELECTRICAL RATINGS
VPWR Supply Voltage (1)
SO Output Driver Power Supply Voltage (1)
V PWR
SO PWR
-1.5 to 50
-0.3 to 7.0
V
V
SPI Interface Logic Input Voltage ( CS , PWM, SI, SO, SCLK, RST )
Output Drain Voltage
V IN
V D
-0.3 to 7.0
-0.3 to 45
V
V
Frequency of SPI Operation
Output Clamp Energy (3)
ESD Voltage
Human Body Model
Machine Model
f SPI
E CLAMP
V ESD1
V ESD2
6.0
50
±2000
±200
MHz
mJ
V
THERMAL RATINGS
Operating Temperature
° C
Ambient
Junction
Case
T A
T J
T C
-40 to 125
-40 to 150
-40 to 125
Storage Temperature
T STG
-55 to 150
° C
Power Dissipation (T A = 25 ° C)
P D
1.7
W
Peak Package Reflow Temperature During Reflow (6) , (7)
Thermal Resistance
T PPRT
°C
° C/W
Junction-to-Ambient
Junction- to-Lead (9)
Junction-to-Flag
R θ JA
R θ JL
R θ JC
75
8.0
1.2
Notes
1.
2.
3.
4.
5.
6.
8.
9.
Exceeding these limits may cause malfunction or permanent damage to the device.
This parameter is guaranteed by design but not production tested.
Maximum output clamp energy capability at 150 ° C junction temperature using single nonrepetitive pulse method.
ESD data available upon request. ESD testing is performed in accordance with the Human Body Model (C ZAP = 100pF, R ZAP = 1500 Ω )
and the Machine Model (C ZAP = 200pF, R ZAP = 0 Ω ).
Maximum power dissipation with no heat sink used.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes
and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.
Tested per JEDEC test JESD52-2 (single-layer PWB).
Tested per JEDEC test JESD51-8 (two-layer PWB).
33996
Analog Integrated Circuit Device Data
4
Freescale Semiconductor
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