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参数资料
型号： KSZ8842-16MBLI TR
厂商： Micrel Inc
文件页数： 112/141页
文件大小： 0K
描述： IC ETHERNET SW 2PORT 100LFBGA
标准包装： 1,000
控制器类型： 以太网开关控制器
接口： PCI
电源电压： 3.1 V ~ 3.5 V
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 100-LBGA
供应商设备封装： 100-LFBGA
包装： 带卷 (TR)
Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
October 2007
72
M9999-102207-1.9
Bank 18 Receive Byte Counter Register (0x06): RXBC
This register indicates the status of the current received frame and mirrors the Receive Byte Count word of the Receive
Frame in the RXQ.
Bit
Default Value
R/W
Description
15-11
-
RO
Reserved
10-0
-
RO
RXBC Receive Byte Count
Receive Byte Count.
Bank 19 Multicast Table Register 0 (0x00): MTR0
The 64-bit multicast table is used for group address filtering. This value is defined as the six most significant bits from
CRC circuit calculation result that is based on 48-bit of DA input. The two most significant bits select one of the four
registers to be used, while the others determine which bit within the register.
Multicast table register 0.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
MTR0 Multicast Table 0
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Bank 19 Multicast Table Register 1 (0x02): MTR1
Multicast table register 1.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
MTR0 Multicast Table 1
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Bank 19 Multicast Table Register 2 (0x04): MTR2
Multicast table register 2.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
MTR0 Multicast Table 2
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
相关PDF资料
PDF描述
KSZ8842-32MVLI IC SWITCH ETH 2P 32BIT 128LQFP
KSZ8842-PMBL AM TR IC ETHERNET SW 2PORT 100LFBGA
KSZ8842-PMQLI IC ETHERNET SW 2PORT PCI 128PQFP
KSZ8851-16MLLI TR IC MAC CTLR 1PORT W/BUS 48LQFP
KSZ8851-16MLLJ IC CTLR MAC 1PORT NON-PCI 48LQFP
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