参数资料
型号: KSZ8842-16MBLI TR
厂商: Micrel Inc
文件页数: 60/141页
文件大小: 0K
描述: IC ETHERNET SW 2PORT 100LFBGA
标准包装: 1,000
控制器类型: 以太网开关控制器
接口: PCI
电源电压: 3.1 V ~ 3.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-LBGA
供应商设备封装: 100-LFBGA
包装: 带卷 (TR)
Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
October 2007
25
M9999-102207-1.9
Pin Number
Pin Name
Type
Pin Function
26
EEEN
Ipd
EEPROM Enable
EEPROM is enabled and connected when this pin is pull-up.
EEPROM is disabled when this pin is pull-down or no connect.
27
P1LED3
Opd
Port 1 LED indicator
See the description in pins 3, 4, and 5.
28
EEDO
Opd
EEPROM Data Out
This pin is connected to DI input of the serial EEPROM.
29
EESK
Opd
EEPROM Serial Clock
A 4
s (OBCR[1:0]=11 on-chip bus speed @ 25 MHz) or 800 ns (OBCR[1:0]=00
on-chip bus speed @ 125 MHz) serial output clock cycle to load configuration
data from the serial EEPROM.
30
EEDI
Ipd
EEPROM Data In
This pin is connected to DO output of the serial EEPROM when EEEN is pull-up.
This pin can be pull-down for 8-bit bus mode, pull-up for 16-bit bus mode or
don’t care for 32-bit bus mode when EEEN is pull-down (without EEPROM).
31
SWR
Ipd
Synchronous Write/Read
Write/Read signal for synchronous bus accesses. Write cycles when high and
Read cycles when low.
32
AEN
Ipu
Address Enable
Address qualifier for the address decoding, active Low.
33
WRN
Ipd
Write Strobe Not
Asynchronous write strobe, active Low.
34
DGND
Gnd
Digital IO ground
35
ADSN
Ipd
Address Strobe Not
For systems that require address latching, the rising edge of ADSN indicates the
latching moment of A15-A1 and AEN.
36
PWRDN
Ipu
Full-chip power-down. Low = Power down; High or floating = Normal operation.
37
AGND
Gnd
Analog ground
38
VDDA
P
1.2V analog VDD input power supply from VDDCO (pin24) through external
Ferrite bead and capacitor.
39
AGND
Gnd
Analog ground
40
NC
No connect
41
NC
No connect
42
AGND
Gnd
Analog ground
43
VDDA
P
1.2V analog VDD input power supply from VDDCO (pin24) through external
Ferrite bead and capacitor.
44
NC
No connect
45
RXP1
I/O
Port 1 physical receive (MDI) or transmit (MDIX) signal (+ differential)
46
RXM1
I/O
Port 1 physical receive (MDI) or transmit (MDIX) signal (– differential)
47
AGND
Gnd
Analog ground
48
TXP1
I/O
Port 1 physical transmit (MDI) or receive (MDIX) signal (+ differential)
49
TXM1
I/O
Port 1 physical transmit (MDI) or receive (MDIX) signal (– differential)
50
VDDATX
P
3.3V analog VDD input power supply with well decoupling capacitors.
51
VDDARX
P
3.3V analog VDD
52
RXM2
I/O
Port 2 physical receive (MDI) or transmit (MDIX) signal (- differential)
53
RXP2
I/O
Port 2 physical receive (MDI) or transmit (MDIX) signal (+ differential)
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