参数资料
型号: LC4064ZC-EV
厂商: Lattice Semiconductor Corporation
文件页数: 16/99页
文件大小: 0K
描述: BOARD EVAL FOR ISPMACH 4064ZC
标准包装: 1
系列: ispMACH®4000Z
类型: CPLD
适用于相关产品: LC4064ZC
所含物品: 板,线缆,电源
其它名称: LC4064ZCEV
Lattice Semiconductor
I/O Recommended Operating Conditions
V CCO (V) 1
ispMACH 4000V/B/C/Z Family Data Sheet
Standard
LVTTL
LVCMOS 3.3
Extended LVCMOS 3.3 2
LVCMOS 2.5
LVCMOS 1.8
PCI 3.3
Min.
3.0
3.0
2.7
2.3
1.65
3.0
Max.
3.6
3.6
3.6
2.7
1.95
3.6
1. Typical values for V CCO are the average of the min. and max. values.
2. ispMACH 4000Z only.
DC Electrical Characteristics
Over Recommended Operating Conditions
Symbol
I IL , I IH 1, 4
I IH 1
I IL , I IH 1
I IH 1,2
I PU
Parameter
Input Leakage Current (ispMACH
4000Z)
Input High Leakage Current (isp-
MACH 4000Z)
Input Leakage Current (ispMACH
4000V/B/C)
Input High Leakage Current (isp-
MACH 4000V/B/C)
I/O Weak Pull-up Resistor Current
(ispMACH 4000Z)
I/O Weak Pull-up Resistor Current
(ispMACH 4000V/B/C)
Condition
0 ? V IN < V CCO
V CCO < V IN ? 5.5V
0 ? V IN ? 3.6V, T j = 105°C
0 ? V IN ? 3.6V, T j = 130°C
3.6V < V IN ? 5.5V, T j = 105°C
3.0V ? V CCO ? 3.6V
3.6V < V IN ? 5.5V, T j = 130°C
3.0V ? V CCO ? 3.6V
0 ? V IN ? 0.7V CCO
0 ? V IN ? 0.7V CCO
Min.
-30
-30
Typ.
0.5
Max.
1
10
10
15
20
50
-150
-200
Units
μA
μA
μA
μA
μA
μA
μA
μA
I PD
I BHLS
I/O Weak Pull-down Resistor Current V IL (MAX) ? V IN ? V IH (MIN)
Bus Hold Low Sustaining Current V IN = V IL (MAX)
30
30
150
μA
μA
I BHHS
I BHLO
I BHHO
V BHT
C 1
C 2
C 3
Bus Hold High Sustaining Current
Bus Hold Low Overdrive Current
Bus Hold High Overdrive Current
Bus Hold Trip Points
I/O Capacitance 3
Clock Capacitance 3
Global Input Capacitance 3
V IN = 0.7 V CCO
0V ? V IN ? V BHT
V BHT ? V IN ? V CCO
V CCO = 3.3V, 2.5V, 1.8V
V CC = 1.8V, V IO = 0 to V IH (MAX)
V CCO = 3.3V, 2.5V, 1.8V
V CC = 1.8V, V IO = 0 to V IH (MAX)
V CCO = 3.3V, 2.5V, 1.8V
V CC = 1.8V, V IO = 0 to V IH (MAX)
-30
V CCO * 0.35
8
6
6
150
-150
V CCO * 0.65
μA
μA
μA
V
pf
pf
pf
1. Input or I/O leakage current is measured with the pin configured as an input or as an I/O with the output driver tristated. It is not
measured with the output driver active. Bus maintenance circuits are disabled.
2. 5V tolerant inputs and I/O should only be placed in banks where 3.0V ? V CCO ? 3.6V.
3. T A = 25°C, f = 1.0MHz
4. I IH excursions of up to 1.5μA maximum per pin above the spec limit may be observed for certain voltage conditions on no more than 10% of
the device’s I/O pins.
16
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