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| 型号： | LT3437EFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 20/28页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 0.5A 16TSSOP |
| 标准包装： | 95 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.25 V ~ 54 V |
| 输入电压： | 3.3 V ~ 60 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 200kHz |
| 电流 - 输出： | 500mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 16-TSSOP-EP |
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LT3437
APPLICATIO S I FOR ATIO
LAYOUT CONSIDERATIONS
As with all high frequency switchers, when considering
layout, care must be taken in order to achieve optimal
electrical, thermal and noise performance. For maximum
efficiency, switch rise and fall times are typically in the
nanosecond range. To prevent noise both radiated and
conducted, the high speed switching current path,
shown in Figure 8, must be kept as short as possible. This
is implemented in the suggested layouts of Figure 9.
Shortening this path will also reduce the parasitic trace
inductance of approximately 25nH/inch. At switch off, this
parasitic inductance produces a flyback spike across the
LT3437 switch. When operating at higher currents and
input voltages, with poor layout, this spike can generate
voltages across the LT3437 that may exceed its absolute
maximum rating. A ground plane should always be used
under the switcher circuitry to prevent interplane coupling
and overall noise.
The V C and FB components should be kept as far away as
possible from the switch and boost nodes. The LT3437
pinout has been designed to aid in this. The ground for
these components should be separated from the switch
current path. Failure to do so will result in poor stability or
subharmonic oscillation.
Board layout also has a significant effect on thermal
resistance. Pin 4/Pin 8 and the exposed die pad, Pin 11/Pin
17, are connected by a continuous copper plate that runs
under the LT3437 die. This is the best thermal path for heat
V IN
LT3437
SW
L1
V OUT
out of the package. Reducing the thermal resistance from
Pin 4 and the exposed pad onto the board will reduce die
temperature and increase the power capability of the
+
V IN
C2
HIGH
FREQUENCY
CIRCULATION
D1
C1
LOAD
LT3437. This is achieved by providing as much copper
area as possible around the exposed pad. Adding multiple
PATH
3437 F08
Figure 8. High Speed Switching Path
solder filled feedthroughs, under and around this pad, to
an internal ground plane will also help. Similar treatment
to the catch diode and coil terminations will reduce any
additional heating effects.
3437fc
20
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3437HFE | 制造商:LINER 制造商全称:Linear Technology 功能描述:High Voltage 500mA, 200kHz Step-Down Switching Regulator with 100μA Quiescent Current |
| LT3437HFE#PBF | 功能描述:IC REG BUCK ADJ 0.5A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LT3437HFE#TRPBF | 功能描述:IC REG BUCK ADJ 0.5A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT3437IDD | 制造商:Linear Technology 功能描述:SP-SWREG/Monolithic, 60V, 500mA, 200kHz Step-down Converter w/ BurstMode |
| LT3437IDD#PBF | 功能描述:IC REG BUCK ADJ 0.5A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
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