参数资料
型号: LT3437EFE#PBF
厂商: Linear Technology
文件页数: 9/28页
文件大小: 0K
描述: IC REG BUCK ADJ 0.5A 16TSSOP
标准包装: 95
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.25 V ~ 54 V
输入电压: 3.3 V ~ 60 V
PWM 型: 电流模式,混合
频率 - 开关: 200kHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 管件
供应商设备封装: 16-TSSOP-EP
LT3437
PI FU CTIO S
(DD/FE)
BIAS (Pin 6/Pin 10): The BIAS pin is used to improve
efficiency when operating at higher input voltages and
light load current. Connecting this pin to the regulated
output voltage forces most of the internal circuitry to draw
its operating current from the output voltage rather than
the input supply. This architecture increases efficiency
especially when the input voltage is much higher than the
output. Minimum output voltage setting for this mode of
operation is typically 2.7V.
V C (Pin 7/Pin 11): The V C pin is the output of the error
amplifier and the input of the peak switch current comparator.
It is normally used for frequency compensation, but can also
serve as a current clamp or control loop override. V C sits at
about 0.45V for light loads and 1.5V at maximum load.
During the sleep portion of Burst Mode operation, the V C
pin is held at a voltage slightly below the burst threshold for
better transient response. Driving the V C pin to ground
will disable switching and place the IC into sleep mode.
FB (Pin 8/Pin 12): The feedback pin is used to determine
the output voltage using an external voltage divider from
the output that generates 1.25V at the FB pin. When the FB
pin drops below 0.9V, switching frequency is reduced, the
SYNC function is disabled and output ramp rate control is
enabled via the C SS pin. See the Feedback section in
Applications Information for details.
SYNC (Pin 9/Pin 14): The SYNC pin is used to synchronize
the internal oscillator to an external signal. It is directly
logic compatible and can be driven with any signal be-
tween 25% and 75% duty cycle. The synchronizing range
is equal to maximum initial operating frequency up to
700kHz. When the voltage on the FB pin is below 0.9V the
SYNC function is disabled. When a synchronization signal
or logic-level high is present at the SYNC pin, Burst Mode
operation is disabled. See the synchronizing section in
Applications Information for details.
SHDN (Pin 10/Pin 15): The SHDN pin is used to turn off the
regulator and to reduce input current to less than 1 μ A. The
SHDN pin requires a voltage above 1.3V with a typical source
current of 5 μ A to take the IC out of the shutdown state.
Exposed Pad (Pin 11/Pin 17): Ground. Must be soldered
to the PCB.
3437fc
9
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