参数资料
型号: LTC2412IGN#TR
厂商: Linear Technology
文件页数: 32/36页
文件大小: 0K
描述: IC CONV A/D 24B 2CH DIFF 16-SSOP
标准包装: 2,500
位数: 24
采样率(每秒): 7.5
数据接口: MICROWIRE?,串行,SPI?
转换器数目: 1
功率耗散(最大): 1mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-SSOP
包装: 带卷 (TR)
输入数目和类型: 1 个差分,双极
配用: DC746A-ND - BOARD DELTA SIGMA ADC LTC2412
LTC2412
5
2412f
Note 1: Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: VCC = 2.7V to 5.5V unless otherwise specified.
VREF = REF+ – REF, VREFCM = (REF+ + REF)/2; VIN = IN+ – IN,
VINCM = (IN+ + IN)/2, IN+ and INare defined as the selected positive
(CH0+ or CH1+) and negative (CH0or CH1) input respectively.
Note 4: FO pin tied to GND or to VCC or to external conversion clock
source with fEOSC = 153600Hz unless otherwise specified.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from
a straight line passing through the actual endpoints of the transfer
curve. The deviation is measured from the center of the quantization
band.
Note 7: FO = 0V (internal oscillator) or fEOSC = 153600Hz ±2%
(external oscillator).
Note 8: FO = VCC (internal oscillator) or fEOSC = 128000Hz ±2%
(external oscillator).
Note 9: The converter is in external SCK mode of operation such that
the SCK pin is used as digital input. The frequency of the clock signal
driving SCK during the data output is fESCK and is expressed in kHz.
Note 10: The converter is in internal SCK mode of operation such that
the SCK pin is used as digital output. In this mode of operation the
SCK pin has a total equivalent load capacitance CLOAD = 20pF.
Note 11: The external oscillator is connected to the FO pin. The external
oscillator frequency, fEOSC, is expressed in kHz.
Note 12: The converter uses the internal oscillator.
FO = 0V or FO = VCC.
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fEOSC
External Oscillator Frequency Range
q
2.56
2000
kHz
tHEO
External Oscillator High Period
q
0.25
390
s
tLEO
External Oscillator Low Period
q
0.25
390
s
tCONV
Conversion Time
FO = 0V
q
130.86
133.53
136.20
ms
FO = VCC
q
157.03
160.23
163.44
ms
External Oscillator (Note 11)
q
20510/fEOSC (in kHz)
ms
fISCK
Internal SCK Frequency
Internal Oscillator (Note 10)
19.2
kHz
External Oscillator (Notes 10, 11)
fEOSC/8
kHz
DISCK
Internal SCK Duty Cycle
(Note 10)
q
45
55
%
fESCK
External SCK Frequency Range
(Note 9)
q
2000
kHz
tLESCK
External SCK Low Period
(Note 9)
q
250
ns
tHESCK
External SCK High Period
(Note 9)
q
250
ns
tDOUT_ISCK
Internal SCK 32-Bit Data Output Time
Internal Oscillator (Notes 10, 12)
q
1.64
1.67
1.70
ms
External Oscillator (Notes 10, 11)
q
256/fEOSC (in kHz)
ms
tDOUT_ESCK
External SCK 32-Bit Data Output Time
(Note 9)
q
32/fESCK (in kHz)
ms
t1
CS
↓ to SDO Low Z
q
0
200
ns
t2
CS
↑ to SDO High Z
q
0
200
ns
t3
CS
↓ to SCK ↓
(Note 10)
q
0
200
ns
t4
CS
↓ to SCK ↑
(Note 9)
q
50
ns
tKQMAX
SCK
↓ to SDO Valid
q
220
ns
tKQMIN
SDO Hold After SCK
(Note 5)
q
15
ns
t5
SCK Set-Up Before CS
q
50
ns
t6
SCK Hold After CS
q
50
ns
The q denotes specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 3)
TI I G CHARACTERISTICS
W
U
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