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参数资料
| 型号： | LTC2412IGN#TR |
| 厂商： | Linear Technology |
| 文件页数： | 5/36页 |
| 文件大小： | 0K |
| 描述： | IC CONV A/D 24B 2CH DIFF 16-SSOP |
| 标准包装： | 2,500 |
| 位数： | 24 |
| 采样率（每秒）： | 7.5 |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 1mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，双极 |
| 配用： | DC746A-ND - BOARD DELTA SIGMA ADC LTC2412 |
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LTC2412
13
2412f
The LTC2412 performs offset and full-scale calibrations
every conversion cycle. This calibration is transparent to
the user and has no effect on the cyclic operation de-
scribed above. The advantage of continuous calibration is
extreme stability of offset and full-scale readings with re-
spect to time, supply voltage change and temperature drift.
Power-Up Sequence
The LTC2412 automatically enters an internal reset state
when the power supply voltage VCC drops below approxi-
mately 2V. This feature guarantees the integrity of the
conversion result and of the serial interface mode selec-
tion. (See the 2-wire I/O sections in the Serial Interface
Timing Modes section.)
When the VCC voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a typical duration of 1ms. The POR signal clears
all internal registers and selects channel 0. Following the
POR signal, the LTC2412 starts a normal conversion cycle
and follows the succession of states described above. The
first conversion result following POR is accurate within the
specifications of the device if the power supply voltage is
restored within the operating range (2.7V to 5.5V) before
the end of the POR time interval.
Reference Voltage Range
This converter accepts a truly differential external refer-
ence voltage. The absolute/common mode voltage speci-
fication for the REF+ and REF– pins covers the entire range
from GND to VCC. For correct converter operation, the
REF+ pin must always be more positive than the REF– pin.
The LTC2412 can accept a differential reference voltage
from 0.1V to VCC. The converter output noise is deter-
mined by the thermal noise of the front-end circuits, and
as such, its value in nanovolts is nearly constant with
reference voltage. A decrease in reference voltage will not
significantly improve the converter’s effective resolution.
On the other hand, a reduced reference voltage will im-
prove the converter’s overall INL performance. A reduced
reference voltage will also improve the converter perfor-
mance when operated with an external conversion clock
(external FO signal) at substantially higher output data
rates (see the Output Data Rate section).
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the CH0+/CH0– or CH1+/CH1–
input pins extending from GND – 0.3V to VCC + 0.3V.
Outside these limits, the ESD protection devices begin to
turn on and the errors due to input leakage current
increase rapidly. Within these limits, the LTC2412 con-
verts the bipolar differential input signal, VIN = IN+ – IN–,
from – FS = – 0.5 VREF to +FS = 0.5 VREF where VREF =
REF+ – REF–, with the selected channel referred as IN+ and
IN–. Outside this range, the converter indicates the
overrange or the underrange condition using distinct
output codes.
Input signals applied to the analog input pins may extend
by 300mV below ground and above VCC. In order to limit
any fault current, resistors of up to 5k may be added in
series with the pins without affecting the performance of
the device. In the physical layout, it is important to main-
tain the parasitic capacitance of the connection between
these series resistors and the corresponding pins as low
as possible; therefore, the resistors should be located as
close as practical to the pins. The effect of the series
resistance on the converter accuracy can be evaluated
from the curves presented in the Input Current/Reference
Current sections. In addition, series resistors will intro-
duce a temperature dependent offset error due to the input
leakage current. A 1nA input leakage current will develop
a 1ppm offset error on a 5k resistor if VREF = 5V. This error
has a very strong temperature dependency.
Output Data Format
The LTC2412 serial output data stream is 32 bits long. The
first 3 bits represent status information indicating the
conversion state, selected channel and sign. The next 24
bits are the conversion result, MSB first. The remaining 5
bits are sub LSBs beyond the 24-bit level that may be
included in averaging or discarded without loss of resolu-
tion. The third and fourth bit together are also used to
indicate an underrange condition (the differential input
voltage is below –FS) or an overrange condition (the
differential input voltage is above +FS).
APPLICATIO S I FOR ATIO
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