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| 型号： | LTC3615EUF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 20/32页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 3A DL 24QFN |
| 标准包装： | 91 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.6 V ~ 5.5 V |
| 输入电压： | 2.25 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 400kHz ~ 4MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 24-QFN 裸露焊盘（4x4） |
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LTC3615/LTC3615-1
APPLICATIONS INFORMATION
Applications section uses faster compensation to improve
load step response.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C OUT , causing a rapid drop in V OUT . No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. More output
capacitance may be required depending on the duty cycle
and load step requirements.
If the ITH pin is tied to SV IN , the active voltage positioning
(AVP) mode and the internal compensation is selected.
In AVP mode, the load regulation performance is inten-
tionally reduced, setting the output voltage at a point that
is dependent on the load current. When the load current
suddenly increases, the output voltage starts from a level
slightly higher than nominal so the output voltage can
droop more and stay within the specified voltage range.
V OUT
200mV/DIV
3A
I L
1A/DIV
100mA
When the load current suddenly decreases, the output
voltage starts at a level lower than nominal so the output
voltage can have more overshoot and stay within the
specified voltage range. This behavior is demonstrated
in Figure 6.
The benefit is a lower peak-to-peak output voltage deviation
for a given load step without having to increase the output
filter capacitance. Alternatively, the output voltage filter
capacitance can be reduced while maintaining the same
peak-to-peak transient response. For this operation mode,
the loop gain is reduced and no external compensation
is required.
Programmable Switch Pin Slew Rate
As switching frequencies rise, it is desirable to minimize the
transition time required when switching to minimize power
losses and blanking time for the switch to settle. However,
fast slewing of the switch node results in relatively high
external radiated EMI and high on-chip supply transients,
which can cause problems for some applications.
V OUT
100mV/DIV
I L
1A/DIV
50μs/DIV
3615 F05
V OUT = 1.8V
I LOAD = 100mA TO 3A
V MODE = 1.5V
COMPENSATION AND OUTPUT CAPACITOR
VALUES OF FIGURE 3
50μs/DIV
V OUT = 1.8V
I LOAD = 100mA TO 3A
V MODE = 1.5V
V IN = V ITH = 3.3V
OUTPUT CAPACITOR VALUE FIGURE 3
3615 F06
Figure 5. Load Step Transient in FCM with External Compensation
Figure 6. Load Step Transient in FCM in AVP Mode
20
For more information www.linear.com/LTC3615
3615fb
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