- 您现在的位置：买卖IC网 > PDF目录14798 > LTC3615EUF#PBF (Linear Technology)IC REG BUCK SYNC ADJ 3A DL 24QFN PDF资料下载
参数资料
| 型号： | LTC3615EUF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 26/32页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 3A DL 24QFN |
| 标准包装： | 91 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.6 V ~ 5.5 V |
| 输入电压： | 2.25 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 400kHz ~ 4MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 24-QFN 裸露焊盘（4x4） |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页当前第26页第27页第28页第29页第30页第31页第32页
LTC3615/LTC3615-1
APPLICATIONS INFORMATION
C SS =
= 9.2nF
4.7M ? In ?
? 5.5V – 0.6V ?
DecouplingthePV IN withtwo47μFcapacitorsisadequate
for most applications.
Finally, it is possible to define the soft-start up time choos-
ing the proper value for the capacitor and the resistor
connected to TRACK/SS pin. If one sets minimum T SS =
5ms and a resistor of 4.7M, the following equation can
be solved with the maximum SV IN = 5.5V:
5ms
? 5.5V ?
?
The standard value of 10nF and 4.7M guarantees the
minimum soft-start time of 5ms. In Figure 3, channel 1
shows the schematic for this design example.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3615:
TYPICAL APPLICATIONS
DDR Memory Termination
1. A ground plane is recommended. If a ground plane
layer is not used, the signal and power grounds should
be segregated with all small signal components returning
to the SGND pin at one point which is then connected to
the PGND node at the exposed pad close to the LTC3615
2. Connect the (+) terminal of the input capacitors, C IN ,
as close as possible to the PV INx pins, and the (–) ter-
minal as close as possible to the exposed pad PGND.
This capacitor provides the AC current into the internal
power MOSFETs.
3. Keep the switching nodes, SWx, away from all sensitive
small signal nodes FBx, ITHx, RTSYNC, SRLIM.
4. Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power components. Connect the copper areas to PGND
(exposed pad) for best performance.
5. Connect the V FBx pins directly to the feedback resis-
tors. The resistor divider must be connected between
V OUTx and SGND.
V IN
3.3V
C IN1
47μF
C IN2
47μF
C IN3
1μF
SV IN (2 × ) PV IN1 (2 × ) PV IN2
RUN1 (2 × ) SW1
TRACK/SS1
PGOOD1
L1
0.47μH
R1
121k
R3
150k
V DDQ
1.8V/3A
C OUT1
47μF
Ratiometric Start-Up
R T /SYNC
R10
15k
C2
1000pF
C1
10pF
R8
174k
R9
226k
ITH1
LTC3615
SRLIM
MODE
PHASE
RUN2
TRACK/SS2
PGOOD2
FB1
(2 × ) SW2
FB2
L2
0.47μH
R2
60.4k
R5
49.9k
R6
49.9k
R4
49.9k
V TT
0.9V
3A/–1.5A
C OUT2
47μF
500mV/
DIV
500μs/DIV
V DD
V TT
3615 TA03b
R7
15k
C4
1000pF
C3
10pF
ITH2 SGND PGND
3615 TA03a
26
For more information www.linear.com/LTC3615
3615fb
相关PDF资料 |
PDF描述 |
|---|---|
| RBC25DCAD | CONN EDGECARD 50POS R/A .100 SLD |
| RBB05DHFR | CONN EDGECARD 10POS .050 SMD |
| LTC3615EUF-1#PBF | IC REG BUCK SYNC ADJ 3A DL 24QFN |
| MAX6423US24+T | IC MPU/RESET CIRC 2.40V SOT143-4 |
| LT1076CR#PBF | IC REG MULTI CONFIG ADJ 2A D2PAK |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC3615HFE#PBF | 制造商:Linear Technology 功能描述:IC REG BUCK SYNC ADJ 3A 24TSSOP |
| LTC3615HFE#TRPBF | 制造商:Linear Technology 功能描述:IC REG BUCK SYNC ADJ 3A 24TSSOP |
| LTC3615HFE-1#PBF | 制造商:Linear Technology 功能描述:IC REG BUCK SYNC ADJ 3A 24TSSOP |
| LTC3615HFE-1#TRPBF | 制造商:Linear Technology 功能描述:IC REG BUCK SYNC ADJ 3A 24TSSOP |
| LTC3615HUF#PBF | 制造商:Linear Technology 功能描述:IC REG BUCK SYNC ADJ 3A 24TSSOP |
发布紧急采购，3分钟左右您将得到回复。