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| 型号： | LTC3859EUHF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 25/42页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST PWM CM 38-QFN |
| 标准包装： | 52 |
| PWM 型： | 电流模式，Burst Mode? |
| 输出数： | 3 |
| 频率 - 最大： | 850kHz |
| 占空比： | 100% |
| 电源电压： | 4.5 V ~ 38 V |
| 降压： | 是 |
| 升压： | 是 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 38-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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LTC3859
APPLICATIONS INFORMATION
The total RMS power lost is lower when both controllers
are operating due to the reduced overlap of current pulses
V OUT
required through the input capacitor’s ESR. This is why
the input capacitor’s requirement calculated above for the
worst-case controller is adequate for the dual controller
design. Also, the input protection fuse resistance, battery
1/3 LTC3859
V FB
3859 F05
R B
R A
C FF
resistance, and PC board trace resistance losses are also
reduced due to the reduced peak currents in a 2-phase
system. The overall bene?t of a multiphase design will
only be fully realized when the source impedance of the
power supply/battery is included in the ef?ciency testing.
The drains of the top MOSFETs should be placed within
1cm of each other and share a common C IN (s). Separat-
ing the drains and C IN may produce undesirable voltage
and current resonances at V IN .
A small (0.1μF to 1μF) bypass capacitor between the chip
V IN pin and ground, placed close to the LTC3859, is also
suggested. A small (1Ω to 10Ω) resistor placed between
C IN (C1) and the V IN pin provides further isolation between
the two channels.
The selection of C OUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satis?ed, the capacitance is adequate for ?ltering. The
output ripple ( D V OUT ) is approximated by:
Figure 5. Setting Output Voltage
To improve the frequency response, a feedforward ca-
pacitor, C FF , may be used. Great care should be taken to
route the V FB line away from noise sources, such as the
inductor or the SW line.
Tracking and Soft-Start
(TRACK/SS1, TRACK/SS2, SS3 Pins)
The start-up of each V OUT is controlled by the voltage on
the respective TRACK/SS pin (TRACK/SS1 for channel 1,
TRACK/SS2 for channel 2, SS3 for channel 3). When the
voltage on the TRACK/SS pin is less than the internal
0.8V reference (1.2V reference for the boost channel), the
LTC3859 regulates the V FB pin voltage to the voltage on the
TRACK/SS pin instead of the internal reference. Likewise,
the TRACK/SS pin for the buck channels can be used to
program an external soft-start function or to allow V OUT
Δ V OUT ≈ Δ I L ? ESR +
?
?
1 ?
8fC OUT ? ?
to track another supply during start-up.
1/3 LTC3859
TRACK/SS
V OUT, BUCK = 0.8V ? 1 + B ?
V OUT, BOOST = 1.2V ? 1 + B ?
t SS _ BUCK = C SS ?
t SS _ BOOST = C SS ?
where f is the operating frequency, C OUT is the output
capacitance and D I L is the ripple current in the inductor.
The output ripple is highest at maximum input voltage
since D I L increases with input voltage.
Setting Output Voltage
The LTC3859 output voltages are each set by an external
feedback resistor divider carefully placed across the output,
as shown in Figure 5. The regulated output voltages are
determined by:
? R ?
? R A ?
? R ?
? R A ?
C SS
SGND
3859 F06
Figure 6. Using the TRACK/SS Pin to Program Soft-Start
Soft-start is enabled by simply connecting a capacitor
from the TRACK/SS pin to ground, as shown in Figure 6.
An internal 1μA current source charges the capacitor,
providing a linear ramping voltage at the TRACK/SS pin.
The LTC3859 will regulate the V FB pin (and hence V OUT )
according to the voltage on the TRACK/SS pin, allowing
V OUT to rise smoothly from 0V to its ?nal regulated value.
The total soft-start time will be approximately:
0.8V
1μA
1.2V
1μA
3859fa
25
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