参数资料
型号: LTC4101EG#PBF
厂商: Linear Technology
文件页数: 10/30页
文件大小: 0K
描述: IC CNTRLR BATT CHRG 24-SSOP
标准包装: 59
功能: 充电管理
电池化学: 智能电池
电源电压: 6 V ~ 28 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 管件
LTC4101
TEST CIRCUIT
LTC4101
+
1.19V
+
EA
V TOL =
V BAT – V VDAC
V VDAC
? 100
21
CSP
22
BAT V SET
18
V DAC
BAT
19
I TH
FOR V VDAC = 4.176V(0 x1050)
DCIN = 21V
4101 TC01
OPERATION
LT1055
0.7V
CLN = CLP = 20V
V DD = 3.3V
Overview (Refer to Block Diagram)
The LTC4101 is composed of a battery charger section, a
charger controller, a 10-bit DAC to control charger current,
an 11-bit DAC to control charger voltage, a SafetySignal
decoder, limit decoder and an SMBus controller block. If
no battery is present, the SafetySignal decoder indicates
a RES_OR condition and charging is disabled by the
charger controller (CHGEN = Low). Charging will also be
disabled if DCDIV is low, or the SafetySignal is decoded
as RES_HOT. If a battery is inserted and AC power is
connected, the battery will be charged with an 80mA
“wake-up” current. The wake-up current is discontinued
after t TIMEOUT if the SafetySignal is decoded as RES_UR
or RES_C0LD, and the battery or host doesn’t transmit
charging commands.
The SMBus interface and control block receives Charg-
ingCurrent() and ChargingVoltage() commands via the
SMBus. If ChargingCurrent() and ChargingVoltage()
command pairs are received within a t TIMEOUT interval, the
values are stored in the current and voltage DACs and the
the commands exceed the programmed limits these limits
are substituted and overrange ?ags are set.
The charger controller will assert SMBALERT whenever
a status change is detected, namely: AC_PRESENT, BAT-
TERY_PRESENT, ALARM_INHIBITED, or V DD power-fail.
The host may query the charger, via the SMBus, to obtain
ChargerStatus() information. SMBALERT will be deasserted
upon a successful read of ChargerStatus() or a successful
Alert Response Address (ARA) request.
Battery Charger Controller
The LTC4101 charger controller uses a constant off-time,
current mode step-down architecture. During normal
operation, the top MOSFET is turned on each cycle when
the oscillator sets the SR latch and turned off when the
main current comparator I CMP resets the SR latch. While
the top MOSFET is off, the bottom MOSFET is turned
on until either the inductor current trips the current
comparator I REV , or the beginning of the next cycle.
The oscillator uses the equation,
charger controller asserts the CHGEN line if the decoded
SafetySignal value will allow charging to commence. Charg-
ingCurrent() and ChargingVoltage() values are compared
t OFF =
(V DCIN – V BAT )
(V DCIN ? f OSC )
against limits programmed by the limit decoder block; if
4101fa
10
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