参数资料
型号: M34519M8-XXXFP
元件分类: 微控制器/微处理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42
封装: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件页数: 63/138页
文件大小: 1146K
代理商: M34519M8-XXXFP
Rev.3.01
2005.06.15
page 28 of 160
REJ03B0007-0301
4519 Group
(4) Notes on External 0 interrupt
Note [1] on bit 3 of register I1
When the input of the INT0 pin is controlled with the bit 3 of reg-
ister I1 in software, be careful about the following notes.
Depending on the input state of the P30/INT0 pin, the external 0
interrupt request flag (EXF0) may be set when the bit 3 of regis-
ter I1 is changed. In order to avoid the occurrence of an
unexpected interrupt, clear the bit 0 of register V1 to “0” (refer to
Figure 18 ) and then, change the bit 3 of register I1.
In addition, execute the SNZ0 instruction to clear the EXF0 flag
to “0” after executing at least one instruction (refer to Figure 18
).
Also, set the NOP instruction for the case when a skip is per-
formed with the SNZ0 instruction (refer to Figure 18 ).
LA
4
; (02)
TV1A
; The SNZ0 instruction is valid ...........
LA
8
; (12)
TI1A
; Control of INT0 pin input is changed
NOP
...........................................................
SNZ0
; The SNZ0 instruction is executed
(EXF0 flag cleared)
NOP
...........................................................
: these bits are not used here.
Fig. 18 External 0 interrupt program example-1
Note [2] on bit 3 of register I1
When the bit 3 of register I1 is cleared to “0”, the RAM back-up
mode is selected and the input of INT0 pin is disabled, be careful
about the following notes.
When the input of INT0 pin is disabled (register I13 = “0”), set the
key-on wakeup function to be invalid (register K20 = “0”) before
system enters to the RAM back-up mode. (refer to Figure 19).
LA
0
; (02)
TK2A
; Input of INT0 key-on wakeup invalid ..
DI
EPOF
POF
; RAM back-up
: these bits are not used here.
Fig. 19 External 0 interrupt program example-2
Note on bit 2 of register I1
When the interrupt valid waveform of the P30/INT0 pin is
changed with the bit 2 of register I1 in software, be careful about
the following notes.
Depending on the input state of the P30/INT0 pin, the external 0
interrupt request flag (EXF0) may be set when the bit 2 of regis-
ter I1 is changed. In order to avoid the occurrence of an
unexpected interrupt, clear the bit 0 of register V1 to “0” (refer to
Figure 20) and then, change the bit 2 of register I1.
In addition, execute the SNZ0 instruction to clear the EXF0 flag
to “0” after executing at least one instruction (refer to Figure
20).
Also, set the NOP instruction for the case when a skip is per-
formed with the SNZ0 instruction (refer to Figure 20).
LA
4
; (02)
TV1A
; The SNZ0 instruction is valid ...........
LA
12
; (12)
TI1A
; Interrupt valid waveform is changed
NOP
...........................................................
SNZ0
; The SNZ0 instruction is executed
(EXF0 flag cleared)
NOP
...........................................................
: these bits are not used here.
Fig. 20 External 0 interrupt program example-3
相关PDF资料
PDF描述
M34519M6-XXXFP 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42
M34553M8H-XXXFP 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP48
M34553M4-XXXFP 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP48
M34553G8HFP 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48
M34553M4H-XXXFP 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP48
相关代理商/技术参数
参数描述
M34-52 制造商:GAMEWELL-FCI 制造商全称:GAMEWELL-FCI 功能描述:Three-Fold Fire Alarm Boxes and Transmitters
M34524EDFP 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34524M8-XXXFP 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34524MC-XXXFP 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES
M3452-C09K1 制造商:Bonitron 功能描述:OVERVOLTAGE BRAKING TRANSISTOR