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| 型号： | M34519M8-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| 封装： | 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42 |
| 文件页数： | 98/138页 |
| 文件大小： | 1146K |
| 代理商： | M34519M8-XXXFP |
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Rev.3.01
2005.06.15
page 60 of 160
REJ03B0007-0301
4519 Group
Program counter (PC) ..........................................................................................................
Address 0 in page 0 is set to program counter.
Interrupt enable flag (INTE) ..................................................................................................
Power down flag (P) .............................................................................................................
External 0 interrupt request flag (EXF0) ..............................................................................
External 1 interrupt request flag (EXF1) ..............................................................................
Interrupt control register V1 ..................................................................................................
Interrupt control register V2 ..................................................................................................
Interrupt control register I1 ...................................................................................................
Interrupt control register I2 ...................................................................................................
Timer 1 interrupt request flag (T1F) .....................................................................................
Timer 2 interrupt request flag (T2F) .....................................................................................
Timer 3 interrupt request flag (T3F) .....................................................................................
Timer 4 interrupt request flag (T4F) .....................................................................................
Watchdog timer flags (WDF1, WDF2) ..................................................................................
Watchdog timer enable flag (WEF) ......................................................................................
Timer control register PA ......................................................................................................
Timer control register W1 .....................................................................................................
Timer control register W2 .....................................................................................................
Timer control register W3 .....................................................................................................
Timer control register W4 .....................................................................................................
Timer control register W5 .....................................................................................................
Timer control register W6 .....................................................................................................
Clock control register MR .....................................................................................................
Clock control register RG .....................................................................................................
Serial I/O transmit/receive completion flag (SIOF) ..............................................................
Serial I/O mode register J1 ..................................................................................................
Serial I/O register SI .............................................................................................................
A/D conversion completion flag (ADF) .................................................................................
A/D control register Q1 .........................................................................................................
A/D control register Q2 .........................................................................................................
A/D control register Q3 .........................................................................................................
Successive comparison register AD ....................................................................................
Comparator register ..............................................................................................................
Key-on wakeup control register K0 ......................................................................................
Key-on wakeup control register K1 ......................................................................................
Key-on wakeup control register K2 ......................................................................................
Pull-up control register PU0 .................................................................................................
Pull-up control register PU1 .................................................................................................
“” represents undefined.
Fig. 49 Internal state at reset 1
(2) Internal state at reset
Figure 49 and 50 show internal state at reset (they are the same af-
ter system is released from reset). The contents of timers, registers,
flags and RAM except shown in Figure are undefined, so set the
initial value to them.
0
000
0
(Interrupt disabled)
0
(Interrupt disabled)
0
(Interrupt disabled)
00
0
1
0
(Prescaler stopped)
0
(Timer 1 stopped)
0
(Timer 2 stopped)
0
(Timer 3 stopped)
0
(Timer 4 stopped)
00
00(Period measurement circuit stopped)
00
11
0
(On-chip oscillator operating)
0
(External clock selected,
serial I/O port not selected)
0
00
00
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