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参数资料
| 型号： | M34519M8-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| 封装： | 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42 |
| 文件页数： | 95/138页 |
| 文件大小： | 1146K |
| 代理商： | M34519M8-XXXFP |
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Rev.3.01
2005.06.15
page 4 of 160
REJ03B0007-0301
4519 Group
PIN DESCRIPTION
Name
Power supply
Ground
CNVSS
Voltage drop
detection circuit
enable
Reset input/output
Main clock input
Pin
VDD
VSS
CNVSS
VDCE
RESET
XIN
Input/Output
—
Input
I/O
Input
Function
Connected to a plus power supply.
Connected to a 0 V power supply.
Connect CNVSS to VSS and apply “L” (0V) to CNVSS certainly.
This pin is used to operate/stop the voltage drop detection circuit. When “H“ level is
input to this pin, the circuit starts operating. When “L“ level is input to this pin, the
circuit stops operating.
An N-channel open-drain I/O pin for a system reset. When the SRST instruction,
watchdog timer, the built-in power-on reset or the voltage drop detection circuit
causes the system to be reset, the RESET pin outputs “L” level.
I/O pins of the main clock generating circuit. When using a ceramic resonator, connect
it between pins XIN and XOUT. When using a 32 kHz quartz-crystal oscillator, connect it
between pins XIN and XOUT. A feedback resistor is built-in between them. When using
the RC oscillation, connect a resistor and a capacitor to XIN, and leave XOUT pin open.
XOUT
Main clock output
Output
D0–D7
P00–P03
P10–P13
P20–P23
P30–P33
P40–P43
P50–P53
P60–P63
CNTR0,
CNTR1
INT0, INT1
AIN0–AIN7
SCK
SOUT
SIN
I/O port D
Input is examined by
skip decision.
I/O port P0
I/O port P1
I/O port P2
I/O port P3
I/O port P4
I/O port P5
I/O port P6
Timer input/output
Interrupt input
Analog input
Serial I/O data I/O
Serial I/O data output
Serial I/O clock input
I/O
Input
I/O
Output
Input
Each pin of port D has an independent 1-bit wide I/O function. The output structure
can be switched to N-channel open-drain or CMOS by software. For input use, set
the latch of the specified bit to “1” and select the N-channel open-drain. Ports D6, D7
is also used as CNTR0 pin and CNTR1 pin, respectively.
Port P0 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P0 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
Port P1 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P1 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
Port P2 serves as a 3-bit I/O port. The output structure is N-channel open-drain. For
input use, set the latch of the specified bit to “1”.
Ports P20–P22 are also used as SCK, SOUT, SIN, respectively.
Port P3 serves as a 4-bit I/O port. The output structure is N-channel open-drain. For
input use, set the latch of the specified bit to “1”.
Ports P30 and P31 are also used as INT0 pin and INT1 pin, respectively.
Port P4 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain. For input use, set the latch of the specified bit to “1”. Ports P40–P43 are
also used as AIN4–AIN7, respectively.
Port P5 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain.
Port P6 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain. For input use, set the latch of the specified bit to “1”. Ports P60–P63 are
also used as AIN0–AIN3, respectively.
CNTR0 pin has the function to input the clock for the timer 1 event counter, and to
output the timer 1 or timer 2 underflow signal divided by 2.
CNTR1 pin has the function to input the clock for the timer 3 event counter, and to
output the PWM signal generated by timer 4.CNTR0 pin and CNTR1 pin are also
used as Ports D6 and D7, respectively.
INT0 pin and INT1 pin accept external interrupts. They have the key-on wakeup func-
tion which can be switched by software. INT0 pin and INT1 pin are also used as
Ports P30 and P31, respectively.
A/D converter analog input pins. AIN0–AIN7 are also used as ports P60–P63 and P40–
P43, respectively.
Serial I/O data transfer synchronous clock I/O pin. SCK pin is also used as port P20..
Serial I/O data output pin. SOUT pin is also used as port P21.
Serial I/O data input pin. SIN pin is also used as port P22.
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相关代理商/技术参数 |
参数描述 |
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| M34524MC-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES |
| M3452-C09K1 | 制造商:Bonitron 功能描述:OVERVOLTAGE BRAKING TRANSISTOR |
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