参数资料
型号: MAX17007GTI+T
厂商: Maxim Integrated Products
文件页数: 24/35页
文件大小: 0K
描述: IC CTRLR QPWM GRAPHICS 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: Quick-PWM™
应用: 电源
电流 - 电源: 1.7mA
电源电压: 4.5 V ~ 26 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(4x4)
包装: 带卷 (TR)
Dual and Combinable QPWM Graphics
Core Controllers for Notebook Computers
R FB 2 HI FB 2 LO ? CSL 2 ? 1 ?
= R
Output Voltage
The MAX17007/MAX17008 feature preset and
adjustable output voltages for both SMPSs, and
dynamic output voltages for SMPS1. In combined
mode, the output voltage is set by REFIN1, and all fea-
tures for SMPS1 output-voltage configuration and
dynamic voltage changes apply to the combined out-
put. Figure 9 is the SMPS target decode block diagram.
Preset/Adjustable Output Voltages
(Dual-Mode Feedback)
Connect REFIN1 to V CC to set the SMPS1 voltage to
voltage to preset 1.5V. The SMPS1 output voltage can
be adjusted up to 2V by changing REFIN1 voltage with-
out using an external resistive voltage-divider. The out-
put voltage of SMPS2 can be adjusted with an external
resistive voltage-divider between CSL2 and GND with
the center tap connected to FB2 (Figure 10). Choose
R FB2LO (resistance from FB2 to GND) to be approxi-
mately 10k ? and solve for R FBHI (resistance from CSL2
to FB2) using the equation:
? V ?
? 0 . 7 V ?
preset 1.05V. Connect FB2 to REF to set the SMPS2
The MAX17007/MAX17008 regulate the valley of the
output ripple, so the actual DC output voltage is higher
V CC - 1V
REFIN1
REF (2.0V)
9.5R
1.05V
PRESET
(FB1 = V CC )
TARGET1
than the slope compensated target by 50% of the out-
put ripple voltage. Under steady-state conditions, the
MAX17007/MAX17008s’ internal integrator corrects for
this 50% output ripple voltage error, resulting in an out-
put-voltage accuracy that is dependent only on the off-
set voltage of the integrator amplifier provided in the
Electrical Characteristics table.
Dynamic Output Voltages (REFIN1)
The MAX17007/MAX17008 regulate the output to the
voltage set at REFIN1. By changing the voltage at
10.5R
(A) SMPS1 TARGET DECODE
REFIN1 (Figure 1), the MAX17007/MAX17008 can be
used in applications that require dynamic output volt-
age changes between two set points. For a step-volt-
age change at REFIN, the rate of change of the output
V CC - 1V
FB2
PRESET
(FB2 = REF)
COMBINE
(FB2 = V CC )
voltage is limited either by the internal 9.5mV/μs slew-
rate circuit or by the component selection—inductor
current ramp, the total output capacitance, the current
limit, and the load during the transition—whichever is
slower. The total output capacitance determines how
much current is needed to change the output voltage,
while the inductor limits the current ramp rate.
REF - 0.3V
TARGET1
REF (2.0V)
TARGET2
LX2
MAX17007 DL2
MAX17008
N L2
L2
R SENSE2
C OUT2
5R
1.5V
GND
CSH2
8R
7R
0.7V
(B) SMPS2 TARGET DECODE
CSL2
FB2
R FB2LO
R FB2HI
Figure 9. SMPS Target Decode Block Diagram
Figure 10. Setting VOUT2 with a Resistive Voltage-Divider
24
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