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参数资料
| 型号： | MAX17101ETJ+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/31页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR DIV PWM CM 32TQFNEP |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 3 |
| 频率 - 最大： | 500kHz |
| 电源电压： | 6 V ~ 24 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 是 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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Dual Quick-PWM, Step-Down Controller
with Low-Power LDO, RTC Regulator
Pin Description
PIN
1
2
NAME
REF
TON
FUNCTION
2V Reference-Voltage Output. Bypass REF to AGND with a 0.1 μF or greater ceramic capacitor. The
reference can source up to 50 μA for external loads. Loading REF degrades output-voltage accuracy
according to the REF load-regulation error (see the Typical Operating Characteristics ). The reference shuts
down when ON1, ON2, and ONLDO are all pulled low.
Switching-Frequency Setting Input. Select the OUT1/OUT2 switching frequencies by connecting TON as
follows for:
High (V CC ) = 200kHz/300kHz
Open (REF) = 400kHz/300kHz
GND = 400kHz/500kHz
3
V CC
Analog Supply Voltage Input. Connect V CC to the system supply voltage with a series 50
bypass to analog ground using a 1μF or greater ceramic capacitor.
resistor, and
4
5
6
7
8
9
10
11
12
13
ONLDO
RTC
IN
LDO
LDOSEL
BYP
OUT1
FB1
ILIM1
PGOOD1
Enable Input for LDO. Drive ONLDO high to enable the linear regulator (LDO) output. Drive ONLDO low to
shut down the linear regulator output.
3.3V Always-On Linear Regulator Output for RTC Power. Bypass RTC with a 1μF or greater ceramic
capacitor to analog ground. RTC can source at least 5mA for external load support. RTC power-up is
required for controller operation.
Power-Input Supply. IN powers the linear regulators (RTC and LDO) and senses the input voltage for the
Quick-PWM on-time one-shot timers. The high-side MOSFET ’s on-time is inversely proportional to the input
voltage. Bypass IN with a 0.1μF or greater ceramic capacitor to PGND close to the MAX17101.
Tracking Linear Regulator Output. Bypass LDO with a 4.7μF or greater ceramic capacitor. LDO can source
at least 100mA for external load support. LDO is powered from IN and its regulation threshold is set by
LDOSEL. For preset 5V operation, connect LDOSEL directly to GND. For preset 3.3V operation, connect
LDOSEL directly to V CC . When LDO is used for 5V operation, LDO must supply V CC and V DD .
Input for the Linear Regulator Output Voltage Selection. LDOSEL sets the LDO regulation voltage. Connect
LDOSEL to GND for a fixed 5V linear-regulator output voltage, or connect LDOSEL to V CC for a fixed 3.3V
linear-regulator output voltage.
Linear Regulator Bypass Input. When BYP voltage exceeds 93.5% of the LDO voltage, the controller
bypasses the LDO output to the BYP input. The bypass switch is disabled if the LDO voltage drops by
8.5% from its nominal regulation threshold. When not being used, connect BYP to GND.
Output Voltage-Sense Input for SMPS1. OUT1 is an input to the Quick-PWM on-time one-shot timer. OUT1 also
serves as the feedback input for the preset 5V (FB1 = GND) and 1.5V (FB1 = V CC ) output voltage settings.
Adjustable Feedback Voltage-Sense Connection for SMPS1. Connect FB1 to GND for fixed 5V operation.
Connect FB1 to V CC for fixed 1.5V operation. Connect FB1 to an external resistive voltage-divider from
OUT1 to analog ground to adjust the output voltage between 0.7V and 5.5V.
Valley Current-Limit Adjustment for SMPS1. The GND - LX1 current-limit threshold is 1/10 the voltage
present on ILIM1 over a 0.2V to 2V range. An internal 5 μA current source allows this voltage to be set with
a single resistor between ILIM1 and analog ground.
Open-Drain Power-Good Output for SMPS1. PGOOD1 is low when the output voltage is more than 16% (typ)
below the nominal regulation threshold, during soft-start, in shutdown, and after the fault latch has been tripped.
After the soft-start circuit has terminated, PGOOD1 becomes high impedance if the output is in regulation.
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