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参数资料
| 型号： | MAX17101ETJ+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 25/31页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR DIV PWM CM 32TQFNEP |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 3 |
| 频率 - 最大： | 500kHz |
| 电源电压： | 6 V ~ 24 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 是 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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Dual Quick-PWM, Step-Down Controller
with Low-Power LDO, RTC Regulator
I LIM ( VAL ) > I LOAD ( MAX ) ? ?
?
?
?
f ESR ≤ SW
Setting the Current Limit
The minimum current-limit threshold must be great
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I LOAD(MAX) minus
half the ripple current; therefore:
? I LOAD(MAX ) LIR ?
2
where I LIM(VAL) equals the minimum valley current-limit
threshold voltage divided by the current-sense resis-
tance (R SENSE ). When using a 100k Ω ILIM resistor, the
minimum valley current-limit threshold is 40mV.
Connect a resistor between ILIM_ and analog ground
(AGND) to set the adjustable current-limit threshold. The
valley current-limit threshold is approximately 1/10 the
ILIM voltage formed by the external resistance and
internal 5μA current source. The 40k Ω to 400k Ω adjust-
ment range corresponds to a 20mV to 200mV valley cur-
rent-limit threshold. When adjusting the current limit, use
1% tolerance resistors to prevent significant inaccuracy
in the valley current-limit tolerance.
Output Capacitor Selection
The output filter capacitor must have low enough equiv-
alent series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements.
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lums, OS-CONs, polymers, and other electrolytics).
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent V SAG and V SOAR from
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
is no longer a problem (see the V SAG and V SOAR equa-
tions in the Transient Response section). However, low-
capacity filter capacitors typically have high ESR zeros
that may affect the overall stability (see the Output
Capacitor Stability Considerations section).
Output Capacitor Stability Considerations
For Quick-PWM controllers, stability is determined by
the value of the ESR zero relative to the switching fre-
quency. The boundary of instability is given by the fol-
lowing equation:
f
π
where:
For processor core voltage converters and other appli-
cations where the output is subject to violent load tran-
f ESR =
1
2 π R ESR C OUT
R ESR ≤
sients, the output capacitor’s size depends on how
much ESR is needed to prevent the output from dip-
ping too low under a load transient. Ignoring the sag
due to finite capacitance:
V STEP
Δ I LOAD ( MAX )
In applications without large and fast load transients,
the output capacitor’s size often depends on how much
ESR is needed to maintain an acceptable level of out-
put voltage ripple. The output ripple voltage of a step-
down controller equals the total inductor ripple current
multiplied by the output capacitor’s ESR. Therefore, the
maximum ESR required to meet ripple specifications is:
For a typical 300kHz application, the ESR zero frequen-
cy must be well below 95kHz, preferably below 50kHz.
Tantalum and OS-CON capacitors in widespread use
at the time of publication have typical ESR zero fre-
quencies of 25kHz. In the design example used for
inductor selection, the ESR needed to support 25mV P-P
ripple is 25mV/1.2A = 20.8m Ω . One 220μF/4V SANYO
polymer (TPE) capacitor provides 15m Ω (max) ESR.
This results in a zero at 48kHz, well within the bounds
of stability.
Do not put high-value ceramic capacitors directly
across the feedback sense point without taking precau-
tions to ensure stability. Large ceramic capacitors can
have a high-ESR zero frequency and cause erratic,
unstable operation. However, it is easy to add enough
R ESR ≤
V RIPPLE
I LOAD ( MAX ) LIR
series resistance by placing the capacitors a couple of
inches downstream from the feedback sense point,
which should be as close as possible to the inductor.
______________________________________________________________________________________
25
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